ds2156gn Maxim Integrated Products, Inc., ds2156gn Datasheet - Page 95

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ds2156gn

Manufacturer Part Number
ds2156gn
Description
Ds2156, Ds2156l, Ds2156ln T1/e1/j1 Single-chip Transceiver Tdm/utopia Ii Interface
Manufacturer
Maxim Integrated Products, Inc.
Datasheet
Register Name:
Register Description:
Register Address:
CH8
CH16
CH24
Setting any of the CH1–CH30 bits in the RSCSE1–RSCSE4 registers causes an interrupt when that channel’s
signaling data changes state.
Register Name:
Register Description:
Register Address:
CH8
CH16
CH24
When a channel’s signaling data changes state, the respective bit in registers RSINFO1–4 is set. An interrupt is
generated if the channel was also enabled as an interrupt source by setting the appropriate bit in RSCSE1–4. The
bit remains set until read.
(MSB)
(MSB)
CH7
CH15
CH23
CH7
CH15
CH23
CH6
CH14
CH22
CH30
CH6
CH14
CH22
CH30
RSCSE1, RSCSE2, RSCSE3, RSCSE4
Receive Signaling Change-of-State Interrupt Enable
3Ch, 3Dh, 3Eh, 3Fh
RSINFO1, RSINFO2, RSINFO3, RSINFO4
Receive Signaling Change-of-State Information
38h, 39h, 3Ah, 3Bh
CH13
CH21
CH29
CH29
CH5
CH5
CH13
CH21
CH4
CH12
CH20
CH28
CH4
CH12
CH20
CH28
95 of 265
CH3
CH11
CH19
CH27
CH3
CH11
CH19
CH27
CH2
CH10
CH18
CH26
CH2
CH10
CH18
CH26
CH1
CH9
CH17
CH25
CH1
CH9
CH17
CH25
(LSB)
(LSB)
RSCSE1
RSCSE2
RSCSE3
RSCSE4
RSINFO1
RSINFO2
RSINFO3
RSINFO4
DS2156

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