ds2156gn Maxim Integrated Products, Inc., ds2156gn Datasheet - Page 45

• Manufacturer Part Number: ds2156gn
• Description: Ds2156, Ds2156l, Ds2156ln T1/e1/j1 Single-chip Transceiver Tdm/utopia Ii Interface
• Manufacturer: Maxim Integrated Products, Inc.

4.2
When the UTOPIA bus is enabled, register space 50h–6A is mapped to the UTOPIA function.
Table 4-B. UTOPIA Register Map
ADDRESS
58, 59,
5A–5F
6B–6F
xxh
6A
50
51
52
53
54
55
56
57
60
61
62
63
64
65
66
67
68
69
UTOPIA Bus Registers
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
W
—
W
—
R
R
R
R
R
R
R
R
Transmit Configuration Register
Transmit PMON Counter-Latch Enable Register
Transmit Assigned Cell Counter MSB
Transmit Assigned Cell Counter LSB
Transmit Idle/Unassigned Payload Byte
Transmit HEC Error-Insertion Pattern
Transmit Control Register 1
Transmit Control Register 2
Reserved
Receive Configuration Register
Receive LCD Integration Period Register
Receive PMON Counter-Latch Enable Register
Receive Correctable HEC Latch Register
Receive Uncorrectable HEC MSB
Receive Uncorrectable HEC LSB
Receive Assigned Cell Counter MSB
Receive Assigned Cell Counter LSB
Receive Status Register
Receive Control Register 1
Receive Control Register 2
Reserved
REGISTER
45 of 265
U_RUHEC1
U_RUHEC2
U_RLCDIP
U_RCHEC
U_RACC1
U_RACC2
SYMBOL
U_TACC1
U_TACC2
U_THEPR
U_TPCLE
U_TIUPB
U_TCFR
U_RCFR
U_RPCE
U_RCR1
U_RCR2
U_TCR1
U_TCR2
U_RSR
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