ds2156gn Maxim Integrated Products, Inc., ds2156gn Datasheet - Page 244

• Manufacturer Part Number: ds2156gn
• Description: Ds2156, Ds2156l, Ds2156ln T1/e1/j1 Single-chip Transceiver Tdm/utopia Ii Interface
• Manufacturer: Maxim Integrated Products, Inc.

Figure 34-19. Transmit-Side Boundary Timing (Elastic Store Disabled)
Note 1: TSYNC is in the output mode (IOCR1.1 = 1).
Note 2: TSYNC is in the input mode (IOCR1.1 = 0).
Note 3: TCHBLK is programmed to block channel 2.
Note 4: TLINK is programmed to source the Sa4 bit.
Note 5: The signaling data at TSIG during channel 1 is normally overwritten in the transmit formatter with the CAS MF alignment nibble (0000).
Note 6: Shown is a TNAF frame boundary.
Figure 34-20. Transmit-Side Boundary Timing, TSYSCLK = 1.544MHz
(Elastic Store Enabled)
Note 1: The F-bit position in the TSER data is ignored.
Note 2: TCHBLK is programmed to block channel 24.
TSYSCLK
TCHBLK
TCHCLK
TSSYNC
TCHBLK
TCHCLK
TSER
TSYNC
TSYNC
TLCLK
TLINK
TSER
TCLK
TSIG
1
2
1
2
3
4
4
LSB
D
DON'T CARE
CHANNEL 23
Si
1
A
Sa4 Sa5 Sa6 Sa7 Sa8
CHANNEL 1
LSB MSB
CHANNEL 1
244 of 265
CHANNEL 24
MSB
DON'T CARE
LSB
CHANNEL 2
CHANNEL 2
A
F MSB
B
C
LSB MSB
CHANNEL 1
D