ds2156gn Maxim Integrated Products, Inc., ds2156gn Datasheet - Page 197

• Manufacturer Part Number: ds2156gn
• Description: Ds2156, Ds2156l, Ds2156ln T1/e1/j1 Single-chip Transceiver Tdm/utopia Ii Interface
• Manufacturer: Maxim Integrated Products, Inc.

Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Note: Writing this register resets the detector’s integration period.
Bit 0/Receive Up-Code Definition Bits 0 (C0). A don’t care if a 1-bit to 7-bit length is selected.
Bit 1/Receive Up-Code Definition Bit 1 (C1). A don’t care if a 1-bit to 6-bit length is selected.
Bit 2/Receive Up-Code Definition Bit 2 (C2). A don’t care if a 1-bit to 5-bit length is selected.
Bit 3/Receive Up-Code Definition Bit 3 (C3). A don’t care if a 1-bit to 4-bit length is selected.
Bit 4/Receive Up-Code Definition Bit 4 (C4). A don’t care if a 1-bit to 3-bit length is selected.
Bit 5/Receive Up-Code Definition Bit 5 (C5). A don’t care if a 1-bit or 2-bit length is selected.
Bit 6/Receive Up-Code Definition Bit 6 (C6). A don’t care if a 1-bit length is selected.
Bit 7/Receive Up-Code Definition Bit 7 (C7). First bit of the repeating pattern.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bits 0–7/Receive Up-Code Definition Bits 0–7 (C0–C7). A don’t care if a 1-bit to 7-bit length is selected.
C7
C7
7
7
0
0
C6
C6
RUPCD1
Receive Up-Code Definition Register 1
B9h
RUPCD2
Receive Up-Code Definition Register 2
BAh
6
0
6
0
C5
C5
5
0
5
0
C4
4
0
C4
4
0
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C3
3
0
C3
3
0
C2
2
0
C2
2
0
C1
C1
1
0
1
0
C0
C0
0
0
0
0