ds2156gn Maxim Integrated Products, Inc., ds2156gn Datasheet - Page 243

• Manufacturer Part Number: ds2156gn
• Description: Ds2156, Ds2156l, Ds2156ln T1/e1/j1 Single-chip Transceiver Tdm/utopia Ii Interface
• Manufacturer: Maxim Integrated Products, Inc.

Figure 34-17. G.802 Timing, E1 Mode Only
Note 1: RCHBLK or TCHBLK programmed to pulse high during time slots 1 through 15, 17 through 25, and bit 1 of time slot 26.
Figure 34-18. Transmit-Side Timing
Note 1: TSYNC in frame mode (IOCR1.2 = 0).
Note 2: TSYNC in multiframe mode (IOCR1.2 = 1).
Note 3: TLINK is programmed to source just the Sa4 bit.
Note 4: This diagram assumes both the CAS MF and the CRC4 MF begin with the TAF frame.
Note 5: TLINK and TLCLK are not synchronous with TSSYNC.
RCHCLK
TCHCLK
RCHBLK
TCHBLK
RSYNC
TSYNC
TS #
FRAME#
TSYNC
TLCLK
TSYNC
TSSYNC
TLINK
31 32
3
3
2
1
0
14 15 16
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
1
2
3
4
5
6
7
RCHCLK / TCHCLK
RCHBLK / TCHBLK
RCLK / RSYSCLK
TCLK / TSYSCLK
8
RSER / TSER
243 of 265
9 10
11 12
13 14 15 16 1
CHANNEL 25
2
LSB MSB
3
4
5
6
CHANNEL 26
7
8
0
9 10
1 2