ds2156gn Maxim Integrated Products, Inc., ds2156gn Datasheet - Page 192

• Manufacturer Part Number: ds2156gn
• Description: Ds2156, Ds2156l, Ds2156ln T1/e1/j1 Single-chip Transceiver Tdm/utopia Ii Interface
• Manufacturer: Maxim Integrated Products, Inc.

Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 0/Diagnostic Loopback Enable (DLBE)
Bit 1/Receive Physical Layer Interface Mode (RPLIM)
Bit 2/Bit must be set = 1 after reset for proper UTOPIA bus mode operation
Bit 3/Receive FIFO Overrun Interrupt Mask (RFOIM)
Bit 4/LCD Interrupt Mask (LCDIM)
Bits 5 to 7/Unassigned, must be set to 0 for proper operation
0 = normal operation
1 = diagnostic loopback is enabled. In this loopback, the transmit data and clock is looped back onto the
receive side. Receiver uses transmit data and clock instead of receive data and clock from physical layer
(typically framer).
0 = clock + data + frame pulse combination
1 = gapped clock + data combination
0 = DS2156 does not generate external interrupt for receive FIFO overrun events
1 = DS2156 generates external interrupt if receive FIFO overrun condition has occurred
0 = DS2156 does not generate external interrupt for LCD state changes
1 = DS2156 generates external interrupt if LCD state has changed
—
7
0
—
U_RCR2
UTOPIA Receive Control Register 2
6Ah
6
0
—
5
0
LCDIM
4
0
192 of 265
RFOIM
3
0
—
2
0
RPLIM
1
0
DLBE
0
0