ds2156gn Maxim Integrated Products, Inc., ds2156gn Datasheet - Page 116
ds2156gn
Manufacturer Part Number
ds2156gn
Description
Ds2156, Ds2156l, Ds2156ln T1/e1/j1 Single-chip Transceiver Tdm/utopia Ii Interface
Manufacturer
Maxim Integrated Products, Inc.
Datasheet
1.DS2156GN.pdf
(265 pages)
- Current page: 116 of 265
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19.
The DS2156 can implement the G.706 CRC-4 recalculation at intermediate path points. When this mode
is enabled, the data stream presented at TSER already has the FAS/NFAS, CRC multiframe alignment
word, and CRC-4 checksum in time slot 0. The user can modify the Sa bit positions. This change in data
content is used to modify the CRC-4 checksum. This modification, however, does not corrupt any error
information the original CRC-4 checksum may contain. In this mode of operation, TSYNC must be
configured to multiframe mode. The data at TSER must be aligned to the TSYNC signal. If TSYNC is an
input, then the user must assert TSYNC aligned at the beginning of the multiframe relative to TSER. If
TSYNC is an output, the user must multiframe-align the data presented to TSER.
Figure 19-1. CRC-4 Recalculate Method
G.706 INTERMEDIATE CRC-4 UPDATING (E1 MODE ONLY)
TPOSO/TNEGO
INSERT
NEW CRC-4
CODE
EXTRACT
OLD CRC-4
CODE
+
CRC-4
CALCULATOR
116 of 265
XOR
NEW Sa BIT
DATA
MODIFY
Sa BIT
POSITIONS
TSER
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