ds2156gn Maxim Integrated Products, Inc., ds2156gn Datasheet - Page 64

• Manufacturer Part Number: ds2156gn
• Description: Ds2156, Ds2156l, Ds2156ln T1/e1/j1 Single-chip Transceiver Tdm/utopia Ii Interface
• Manufacturer: Maxim Integrated Products, Inc.

Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 0/Transmit CRC4 Enable (TCRC4)
Bit 1/Transmit G.802 Enable (TG802). See Section 34 for details.
Bit 2/Transmit HDB3 Enable (THDB3)
Bit 3/Transmit Signaling All Ones (TSA1)
Bit 4/Transmit International Bit Select (TSiS)
Bit 5/Transmit Unframed All Ones (TUA1)
Bit 6/Transmit Time Slot 16 Data Select (T16S). See Section 15.2 for details.
Bit 7/Transmit Time Slot 0 Pass-Through (TFPT)
0 = CRC4 disabled
1 = CRC4 enabled
0 = do not force TCHBLK high during bit 1 of time slot 26
1 = force TCHBLK high during bit 1 of time slot 26
0 = HDB3 disabled
1 = HDB3 enabled
0 = normal operation
1 = force time slot 16 in every frame to all ones
0 = sample Si bits at TSER pin
1 = source Si bits from TAF and TNAF registers (in this mode, E1TCR1.7 must be set to 0)
0 = transmit data normally
1 = transmit an unframed all-ones code at TPOSO and TNEGO
0 = time slot 16 determined by the SSIEx registers and the THSCS function in the PCPR register
1 = source time slot 16 from TS1 to TS16 registers
0 = FAS bits/Sa bits/remote alarm sourced internally from the TAF and TNAF registers
1 = FAS bits/Sa bits/remote alarm sourced from TSER
TFPT
7
0
T16S
E1TCR1
E1 Transmit Control Register 1
35h
6
0
TUA1
5
0
TSiS
4
0
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TSA1
3
0
THDB3
2
0
TG802
1
0
TCRC4
0
0