ds2156gn Maxim Integrated Products, Inc., ds2156gn Datasheet - Page 112

• Manufacturer Part Number: ds2156gn
• Description: Ds2156, Ds2156l, Ds2156ln T1/e1/j1 Single-chip Transceiver Tdm/utopia Ii Interface
• Manufacturer: Maxim Integrated Products, Inc.

Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 0/Receive Elastic Store Enable (RESE)
Bit 1/Receive Elastic Store Minimum-Delay Mode (RESMDM). See Section 18.4 for details.
Bit 2/Receive Elastic Store Reset (RESR). Setting this bit from a 0 to a 1 forces the read and write pointers into
opposite frames, maximizing the delay through the receive elastic store. It should be toggled after RSYSCLK has
been applied and is stable. See Section 18.3 for details. Do not leave this bit set HIGH.
Bit 3/Receive Elastic Store Align (RESALGN). Setting this bit from a 0 to a 1 forces the receive elastic store’s
write/read pointers to a minimum separation of half a frame. No action is taken if the pointer separation is already
greater or equal to half a frame. If pointer separation is less than half a frame, the command is executed and the
data is disrupted. It should be toggled after RSYSCLK has been applied and is stable. Must be cleared and set again
for a subsequent align. See Section 18.3 for details.
Bit 4/Transmit Elastic Store Enable (TESE)
Bit 5/Transmit Elastic Store Minimum-Delay Mode (TESMDM). See Section 18.4 for details.
Bit 6/Transmit Elastic Store Reset (TESR). Setting this bit from a 0 to a 1 forces the read and write pointers into
opposite frames, maximizing the delay through the transmit elastic store. Transmit data is lost during the reset. It
should be toggled after TSYSCLK has been applied and is stable. See Section 18.3 for details. Do not leave this bit
set HIGH.
Bit 7/Transmit Elastic Store Align (TESALGN). Setting this bit from a 0 to a 1 forces the transmit elastic store’s
write/read pointers to a minimum separation of half a frame. No action is taken if the pointer separation is already
greater or equal to half a frame. If pointer separation is less than half a frame, the command is executed and the
data is disrupted. It should be toggled after TSYSCLK has been applied and is stable. It must be cleared and set
again for a subsequent align. See Section 18.3 for details.
0 = elastic store is bypassed
1 = elastic store is enabled
0 = elastic stores operate at full two-frame depth
1 = elastic stores operate at 32-bit depth
0 = elastic store is bypassed
1 = elastic store is enabled
0 = elastic stores operate at full two-frame depth
1 = elastic stores operate at 32-bit depth
TESALGN
7
0
ESCR
Elastic Store Control Register
4Fh
TESR
6
0
TESMDM
5
0
TESE
4
0
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RESALGN
3
0
RESR
2
0
RESMDM
1
0
RESE
0
0