ds2156gn Maxim Integrated Products, Inc., ds2156gn Datasheet - Page 208

• Manufacturer Part Number: ds2156gn
• Description: Ds2156, Ds2156l, Ds2156ln T1/e1/j1 Single-chip Transceiver Tdm/utopia Ii Interface
• Manufacturer: Maxim Integrated Products, Inc.

26.5 BERT Bit Counter
Once BERT has achieved synchronization, this 32-bit counter increments for each data bit (i.e., clock)
received. Toggling the LC control bit in BC1 can clear this counter. This counter saturates when full and
sets the BBCO status bit.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bits 0 to 7/BERT Bit Counter Bits 0 to 7 (BBC0 to BBC7). BBC0 is the LSB of the 32-bit counter.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bits 0 to 7/BERT Bit Counter Bits 8 to 15 (BBC8 to BBC15)
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bits 0 to 7/BERT Bit Counter Bits 16 to 23 (BBC16 to BBC23)
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bits 0 to 7/BERT Bit Counter Bits 24 to 31 (BBC24 to BBC31). BBC31 is the MSB of the 32-bit counter.
BBC15
BBC23
BBC31
BBC7
7
7
7
7
0
0
0
0
BBC14
BBC22
BBC30
BBC6
BBC1
BERT Bit Count Register 1
E3h
BBC2
BERT Bit Count Register 2
E4h
BBC3
BERT Bit Count Register 3
E5h
BBC4
BERT Bit Count Register 4
E6h
6
0
6
0
6
0
6
0
BBC13
BBC21
BBC29
BBC5
5
0
5
0
5
0
5
0
BBC12
BBC20
BBC28
BBC4
4
0
4
0
4
0
4
0
208 of 265
BBC11
BBC19
BBC27
BBC3
3
0
3
0
3
0
3
0
BBC2
BBC10
BBC18
BBC26
2
0
2
0
2
0
2
0
BBC1
BBC17
BBC25
BBC9
1
0
1
0
1
0
1
0
BBC16
BBC24
BBC0
BBC8
0
0
0
0
0
0
0
0