ds2156gn Maxim Integrated Products, Inc., ds2156gn Datasheet - Page 160

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ds2156gn

Manufacturer Part Number
ds2156gn
Description
Ds2156, Ds2156l, Ds2156ln T1/e1/j1 Single-chip Transceiver Tdm/utopia Ii Interface
Manufacturer
Maxim Integrated Products, Inc.
Datasheet
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 0/Loss-of-Transmit Clock Condition (LOLITC)
Bit 1/Transmit Open-Circuit Detect Condition (TOCD)
Bit 2/Transmit Current-Limit Exceeded Condition (TCLE)
Bit 3/Line Interface Receive Carrier-Loss Condition (LRCL)
Bit 4/Jitter Attenuator Limit Trip Event (JALT)
Bit 5/Receive Signaling Change-of-State Event (RSCOS)
Bit 6/Timer Event (TIMER)
Bit 7/Input Level Under Threshold (ILUT)
0 = interrupt masked
1 = interrupt enabled—generates interrupts on rising and falling edges
0 = interrupt masked
1 = interrupt enabled—generates interrupts on rising and falling edges
0 = interrupt masked
1 = interrupt enabled—generates interrupts on rising and falling edges
0 = interrupt masked
1 = interrupt enabled—generates interrupts on rising and falling edges
0 = interrupt masked
1 = interrupt enabled
0 = interrupt masked
1 = interrupt enabled
0 = interrupt masked
1 = interrupt enabled
0 = interrupt masked
1 = interrupt enabled
ILUT
7
0
TIMER
IMR1
Interrupt Mask Register 1
17h
6
0
RSCOS
5
0
JALT
4
0
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LRCL
3
0
TCLE
2
0
TOCD
1
0
LOLITC
0
0

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