ds2156gn Maxim Integrated Products, Inc., ds2156gn Datasheet - Page 37

• Manufacturer Part Number: ds2156gn
• Description: Ds2156, Ds2156l, Ds2156ln T1/e1/j1 Single-chip Transceiver Tdm/utopia Ii Interface
• Manufacturer: Maxim Integrated Products, Inc.

LQFP
100
49
50
51
52
53
54
55
56
57
58
59
62
63
64
65
66
67
68
69
70
71
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75
76
77
78
79
82
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
PIN
CSBGA
D10
A10
K10
H10
E10
C10
B10
F10
J10
K9
H8
G7
H9
G8
G9
D9
D8
C9
B9
C8
A9
A8
A7
C6
B6
A6
D6
A5
B5
C5
A4
D5
B4
A3
C4
A2
B3
F9
F7
F6
E9
E8
E7
E6
J8
J9
ALE (AS)/A7
RLOS/LOTC
UR-ADDR0
UR-ADDR1
UR-ADDR2
UR-ADDR3
UR-ADDR4
UT-DATA7
UR-DATA0
UR-DATA1
UR-DATA2
UR-DATA3
UR-DATA4
UR-DATA5
UR-DATA6
UR-DATA7
UT-2CLAV
UT-UTDO
UR-CLAV
SYMBOL
WR (R/W)
UR-CLK
UT-CLK
RD (DS)
ESIBRD
D0/AD0
D1/AD1
D2/AD2
D3/AD3
D4/AD4
D5/AD5
D6/AD6
D7/AD7
RDATA
TDATA
RSYNC
ESIBS1
RCLK
MUX
CS
A0
A1
A2
A3
A4
A5
A6
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TYPE
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
UTOPIA Transmit Data Output
Transmit Data
UTOPIA Transmit Data Bus Bit 7
UTOPIA Transmit Clock
UTOPIA Receive Clock
Extended System Information Bus 1
Bus Operation
Data Bus Bit0/Address/Data Bus Bit 0
Data Bus Bit1/Address/Data Bus Bit 1
Data Bus Bit 2/Address/Data Bus 2
Data Bus Bit 3/Address/Data Bus Bit 3
Data Bus Bit4/Address/Data Bus Bit 4
Data Bus Bit 5/Address/Data Bus Bit 5
Data Bus Bit 6/Address/Data Bus Bit 6
Data Bus Bit 7/Address/Data Bus Bit 7
Address Bus Bit 0
Address Bus Bit 1
Address Bus Bit 2
Address Bus Bit 3
Address Bus Bit 4
Address Bus Bit 5
Address Bus Bit 6
Address Latch Enable/Address Bus Bit 7
Read Input (Data Strobe)
Chip Select
Extended System Information Bus Read
Write Input (Read/Write)
UTOPIA Receive Data Bus Bit 0
UTOPIA Receive Data Bus Bit 1
Receive Clock
Receive Data
UTOPIA Receive Data Bus Bit 2
UTOPIA Receive Data Bus Bit 3
UTOPIA Receive Data Bus Bit 4
UTOPIA Receive Data Bus Bit 5
UTOPIA Receive Data Bus Bit 6
UTOPIA Receive Data Bus Bit 7
UTOPIA Receive Address Bus Bit 0
UTOPIA Receive Address Bus Bit 1
UTOPIA Receive Address Bus Bit 2
UTOPIA Receive Cell Available
UTOPIA Receive Address Bus Bit 3
UTOPIA Receive Address Bus Bit 4
Receive Sync
Receive Loss-of-Sync/Loss-of-Transmit Clock
UTOPIA Transmit 2 Cells Available
DESCRIPTION