MPC564MZP56 Freescale Semiconductor, MPC564MZP56 Datasheet - Page 1007

• Manufacturer Part Number: MPC564MZP56
• Description: IC MCU 512K FLASH 56MHZ 388-BGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC564MZP56

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 56MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 56
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 388-BGA
• Core: PowerPC
• Processor Series: MPC5xx
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 56 MHz
• Data Ram Size: 32 KB
• On-chip Adc: Yes
• Number Of Programmable I/os: 56
• Number Of Timers: 2
• Operating Supply Voltage: 0 V to 5 V
• Mounting Style: SMD/SMT
• A/d Bit Size: 10 bit
• A/d Channels Available: 32
• Height: 1.95 mm
• Interface Type: CAN, JTAG, QSPI, SCI, SPI, UART
• Length: 27 mm
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Supply Voltage (max): 2.7 V, 5.25 V
• Supply Voltage (min): 2.5 V, 4.75 V
• Width: 27 mm
• For Use With: MPC564EVB - KIT EVAL FOR MPC561/562/563/564
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No RoHS Version Available

24.8.2.2
Indirect branches include interrupts, exceptions, and all taken branches whose destination is determined at
run time. For the RCPU, certain sequential instructions are tagged with the indirect change-of-flow
attribute because these instruction affect the machine in a similar manner to true indirect change-of-flow
instructions. These instructions are the rfi, isync, mtmsr and certain mtspr (to CMPA – CMPF, ICTRL,
ECR and DER)
The program trace indirect branch message has the following format:
For compressed code support, six additional bits indicate the starting bit address within the word of the
compressed instruction.
The program trace indirect branch with compressed code message has the format shown in
The format of the bit address field is shown in
Freescale Semiconductor
[6 bits]
TCODE (59)
RCPU
Bits
4:5
0:3
Indirect Branch Messages
On the MPC562/MPC564, the bit pointer should be multiplied by 2 (shift
left on bit) for the actual starting bit position.
MSB
[6 bits]
Figure 24-21. Indirect Branch Message Format with Compressed Code
5
TCODE (4)
Figure 24-22. Bit Pointer Format with Compressed Code
[1-8 bits]
Sequence Count
Nexus
Bits
0:1
2:5
Figure 24-20. Indirect Branch Message Format
4
MPC561/MPC563 Reference Manual, Rev. 1.2
Sequence Count
Max Length = 40 bits
Min Length = 14 bits
Table 24-26. Bit Pointer Format
Bit Pointer
Max Length = 37 bits
Min Length = 8 bits
[1 - 8 bits]
3
Name
BP
Figure
—
NOTE
[6 bits]
Bit Pointer
24-22. The bit definitions are shown in
2
Reserved (Unused)
Bit pointer. This value is 1/2 of the actual bit position on
which the instruction starts.
Relative Address
[1 - 23 bits]
1
[1-23 bits]
Reserved
Relative Address
Description
LSB
0
Figure
Table
READI Module
24-21.
24-26.
24-39