MPC564MZP56 Freescale Semiconductor, MPC564MZP56 Datasheet - Page 864

• Manufacturer Part Number: MPC564MZP56
• Description: IC MCU 512K FLASH 56MHZ 388-BGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC564MZP56

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 56MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 56
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 388-BGA
• Core: PowerPC
• Processor Series: MPC5xx
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 56 MHz
• Data Ram Size: 32 KB
• On-chip Adc: Yes
• Number Of Programmable I/os: 56
• Number Of Timers: 2
• Operating Supply Voltage: 0 V to 5 V
• Mounting Style: SMD/SMT
• A/d Bit Size: 10 bit
• A/d Channels Available: 32
• Height: 1.95 mm
• Interface Type: CAN, JTAG, QSPI, SCI, SPI, UART
• Length: 27 mm
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Supply Voltage (max): 2.7 V, 5.25 V
• Supply Voltage (min): 2.5 V, 4.75 V
• Width: 27 mm
• For Use With: MPC564EVB - KIT EVAL FOR MPC561/562/563/564
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No RoHS Version Available

CDR3 Flash (UC3F) EEPROM
The UC3F EEPROM module array is divided into array blocks to allow for independent erase, address
attributes restrictions, and protection from program and erase for each array block. The size of a large array
block in the UC3F module is fixed at 64 Kbytes. The size of a subdivided large block becomes the original
large array block size minus 16 Kbytes (64 Kbytes – 16 Kbytes = 48 Kbytes). The size of the small block,
which is the remainder of the large block, is always 16 Kbytes. The total UC3F EEPROM array is
distributed into eight large blocks, two of which contain small blocks. Information is transferred to the
UC3F EEPROM by long-word (64 bits), word (32 bits), half-word (16 bits), or byte (8 bits).
To improve system performance, each array read access retrieves 32 bytes of information. These 32 bytes
may be copied into one of two read page buffers aligned to the low order addresses. The two read page
buffers are independently updated by page management logic contained in the BIU which interfaces to the
UC3F EEPROM module.
21-2
B0EPEE
VFLASH
EPEE
VDDF
VSSF
U-Bus
Figure 21-1. Block Diagram for a 512 Kbyte UC3F Module Configuration
Memory Interface (MI)
Internal
Timer
MPC561/MPC563 Reference Manual, Rev. 1.2
Program/Erase
Read Control
Program/Erase
Control
Generation
Voltage
Bus Interface Unit (BIU)
UC3F Array Core
Register
Block
Pgm Data
Block 0 (16 Kbytes + 48 Kbytes)
Block 1 (48 Kbytes + 16 Kbytes)
Block 2 (64 Kbytes)
Block 3 (64 Kbytes)
Block 4 (64 Kbytes)
Block 5 (64 Kbytes)
Block 6 (64 Kbytes)
Block 7 (64 Kbytes)
Latch
Column Decode
Data Mux
Read Page Buffer 0
Read Page Buffer 1
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