MPC564MZP56 Freescale Semiconductor, MPC564MZP56 Datasheet - Page 912

• Manufacturer Part Number: MPC564MZP56
• Description: IC MCU 512K FLASH 56MHZ 388-BGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC564MZP56

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 56MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 56
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 388-BGA
• Core: PowerPC
• Processor Series: MPC5xx
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 56 MHz
• Data Ram Size: 32 KB
• On-chip Adc: Yes
• Number Of Programmable I/os: 56
• Number Of Timers: 2
• Operating Supply Voltage: 0 V to 5 V
• Mounting Style: SMD/SMT
• A/d Bit Size: 10 bit
• A/d Channels Available: 32
• Height: 1.95 mm
• Interface Type: CAN, JTAG, QSPI, SCI, SPI, UART
• Length: 27 mm
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Supply Voltage (max): 2.7 V, 5.25 V
• Supply Voltage (min): 2.5 V, 4.75 V
• Width: 27 mm
• For Use With: MPC564EVB - KIT EVAL FOR MPC561/562/563/564
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No RoHS Version Available

CALRAM Operation
to be four bytes, regardless of the value programmed in the RGN_SIZE[0:3] field. See
“CALRAM Overlay Configuration Register
The implemented bits of CRAM_RBAx bits are unaffected by reset (hard reset). The diagram below shows
one such register, CRAM_RBA0, which provides the base address of overlay region 0.
22-16
SRESET
SRESET
1
11:29
30:31
Bits
4:10
The overlay match address will include ISB in its comparison. The overlay can only be in the range of the ISB internal
space.
0:3
Field
Field
Addr
RGN_SIZ
MSB
16
0
Name
RBA
—
—
E
RGN_SIZE
Unaffected
Figure 22-10. CALRAM Region Base Address Register (CRAM_RBAx)
17
1
These bits define the size of the overlay region. See
Reserved
The region base address defines the starting address of the memory to be overlayed.
Reserved
18
2
Note: The overlay size of 8 bytes cannot be selected
19
3
Table 22-5. CRAM_RBAx Bit Descriptions
MPC561/MPC563 Reference Manual, Rev. 1.2
RGN_SIZE
20
0000
0001
0010
0011
0100
0101
0110
0111
1xxx
4
Table 22-6. RGN_SIZE Encoding
21
5
(CRAM_OVLCR)” for details.
Unaffected
22
0x38 0008–0x38 0024
6
RBA
0000_000
Number of Overlay Bytes
Overlay block is 128 bytes
Overlay block is 256 bytes
Overlay block is 512 bytes
Overlay block is 16 bytes
Overlay block is 32 bytes
Overlay block is 64 bytes
—
23
7
Overlay block is 4 bytes
Overlay block disabled
Description
24
Reserved
8
25
9
Table 22-6
10
26
for sizes.
11
27
12
28
Unaffected
Freescale Semiconductor
RBA
Section 22.5.3,
13
29
1
14
30
00
—
LSB
15
31