MPC564MZP56 Freescale Semiconductor, MPC564MZP56 Datasheet - Page 83

• Manufacturer Part Number: MPC564MZP56
• Description: IC MCU 512K FLASH 56MHZ 388-BGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC564MZP56

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 56MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 56
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 388-BGA
• Core: PowerPC
• Processor Series: MPC5xx
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 56 MHz
• Data Ram Size: 32 KB
• On-chip Adc: Yes
• Number Of Programmable I/os: 56
• Number Of Timers: 2
• Operating Supply Voltage: 0 V to 5 V
• Mounting Style: SMD/SMT
• A/d Bit Size: 10 bit
• A/d Channels Available: 32
• Height: 1.95 mm
• Interface Type: CAN, JTAG, QSPI, SCI, SPI, UART
• Length: 27 mm
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Supply Voltage (max): 2.7 V, 5.25 V
• Supply Voltage (min): 2.5 V, 4.75 V
• Width: 27 mm
• For Use With: MPC564EVB - KIT EVAL FOR MPC561/562/563/564
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No RoHS Version Available

References
The Sematech Official Dictionary and the Reference Guide to Letter Symbols for Semiconductor Devices
by the JEDEC Council/Electronics Industries Association are recommended as references for terminology
and symbology.
Freescale Semiconductor
No-op
SRR0
SRR1
UIMM
Term
IABR
JTAG
RISC
UISA
IEEE
LIFO
MSR
GPR
MSB
OEA
POR
PVR
SPR
XER
FPU
LSU
NaN
TBU
VEA
LSB
TBL
TLB
PLL
TTL
LR
TB
IU
Floating-point unit
General-purpose register
Instruction address breakpoint register
Institute for Electrical and Electronics Engineers
Integer unit
Joint Test Action Group
Last-in-first-out
Link register
Least-significant bit
Load/store unit
Most-significant bit
Machine state register
Not a number
No operation
Operating environment architecture
Phase-locked loop
Power-on reset
Processor version register
Reduced instruction set computing
Special-purpose register
Machine status save/restore register 0
Machine status save/restore register 1
Time base facility
Time base lower register
Time base upper register
Translation lookaside buffer
Transistor-to-transistor logic
Unsigned immediate value
User instruction set architecture
Virtual environment architecture
Register used for indicating conditions such as carries and overflows for integer operations
Table ii. Acronyms and Abbreviated Terms (continued)
MPC561/MPC563 Reference Manual, Rev. 1.2
Meaning
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