MPC564MZP56 Freescale Semiconductor, MPC564MZP56 Datasheet - Page 383

• Manufacturer Part Number: MPC564MZP56
• Description: IC MCU 512K FLASH 56MHZ 388-BGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC564MZP56

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 56MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 56
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 388-BGA
• Core: PowerPC
• Processor Series: MPC5xx
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 56 MHz
• Data Ram Size: 32 KB
• On-chip Adc: Yes
• Number Of Programmable I/os: 56
• Number Of Timers: 2
• Operating Supply Voltage: 0 V to 5 V
• Mounting Style: SMD/SMT
• A/d Bit Size: 10 bit
• A/d Channels Available: 32
• Height: 1.95 mm
• Interface Type: CAN, JTAG, QSPI, SCI, SPI, UART
• Length: 27 mm
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Supply Voltage (max): 2.7 V, 5.25 V
• Supply Voltage (min): 2.5 V, 4.75 V
• Width: 27 mm
• For Use With: MPC564EVB - KIT EVAL FOR MPC561/562/563/564
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No RoHS Version Available

The MPC561/MPC563 samples the CR line at the rising edge of CLKOUT. When this signal is asserted,
the reservation flag is reset (negated).
The external bus interface (EBI) samples the logical value of the reservation flag prior to externally
starting a bus cycle initiated by the RCPU stwcx instruction. If the reservation flag is set, the EBI begins
with the bus cycle. If the reservation flag is reset, no bus cycle is initiated externally, and this situation is
reported to the RCPU.
The reservation protocol for a multi-level (local) bus is illustrated in
situation in which the reserved location is sited in the remote bus.
Freescale Semiconductor
lwarx
MPC500 Device
External Bus
CLKOUT
S
R
Interface
Q
MPC561/MPC563 Reference Manual, Rev. 1.2
Figure 9-30. Reservation on Local Bus
AT[0:3], RSV, R/W, TS
CR
External Bus
Reservation
Logic
ADDR[0:29]
Figure
9-31. The system describes the
CR
External Bus Interface
Master
Bus
9-43