MPC564MZP56 Freescale Semiconductor, MPC564MZP56 Datasheet - Page 484

• Manufacturer Part Number: MPC564MZP56
• Description: IC MCU 512K FLASH 56MHZ 388-BGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC564MZP56

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 56MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 56
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 388-BGA
• Core: PowerPC
• Processor Series: MPC5xx
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 56 MHz
• Data Ram Size: 32 KB
• On-chip Adc: Yes
• Number Of Programmable I/os: 56
• Number Of Timers: 2
• Operating Supply Voltage: 0 V to 5 V
• Mounting Style: SMD/SMT
• A/d Bit Size: 10 bit
• A/d Channels Available: 32
• Height: 1.95 mm
• Interface Type: CAN, JTAG, QSPI, SCI, SPI, UART
• Length: 27 mm
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Supply Voltage (max): 2.7 V, 5.25 V
• Supply Voltage (min): 2.5 V, 4.75 V
• Width: 27 mm
• For Use With: MPC564EVB - KIT EVAL FOR MPC561/562/563/564
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No RoHS Version Available

QADC64E Legacy Mode Operation
Each time a CCW is read for queue 1, the CCW location is compared with the current value of the BQ2
pointer to detect a possible end-of-queue condition. For example, if BQ2 is changed to CCW3 while queue
1 is converting CCW2, queue 1 is terminated after the conversion is completed. However, if BQ2 is
changed to CCW1 while queue 1 is converting CCW2, the QADC64E would not recognize a BQ2
end-of-queue condition until queue 1 execution reached CCW1 again, presumably on the next pass
through the queue.
13.3.8
The status registers contains information about the state of each queue and the current A/D conversion.
Except for the four flag bits (CF1, PF1, CF2, and PF2) and the two trigger overrun bits (TOR1 and TOR2),
13-20
Status Registers (QASR0 and QASR1)
If BQ2 was assigned to the CCW that queue 1 is currently working on, then
that conversion is completed before BQ2 takes effect.
MQ2[3:7]
01011
01100
01101
01110
01111
10000
10001
10010
10011
10100
10101
10110
10111
11000
11001
11010
11011
11100
11101
11110
11111
Table 13-13. Queue 2 Operating Modes (continued)
Interval timer single-scan mode: time = QCLK period x 2
Interval timer single-scan mode: time = QCLK period x 2
Interval timer single-scan mode: time = QCLK period x 2
Interval timer single-scan mode: time = QCLK period x 2
Reserved mode
Reserved mode
Software triggered continuous-scan mode
External trigger rising edge continuous-scan mode
External trigger falling edge continuous-scan mode
Periodic timer continuous-scan mode: time = QCLK period x 2
Periodic timer continuous-scan mode: time = QCLK period x 2
Periodic timer continuous-scan mode: time = QCLK period x 2
Periodic timer continuous-scan mode: time = QCLK period x 2
Periodic timer continuous-scan mode: time = QCLK period x 2
Periodic timer continuous-scan mode: time = QCLK period x 2
Periodic timer continuous-scan mode: time = QCLK period x 2
Periodic timer continuous-scan mode: time = QCLK period x 2
Periodic timer continuous-scan mode: time = QCLK period x 2
Periodic timer continuous-scan mode: time = QCLK period x 2
Periodic timer continuous-scan mode: time = QCLK period x 2
Reserved mode
MPC561/MPC563 Reference Manual, Rev. 1.2
NOTE
Operating Modes
14
15
16
17
7
8
9
10
11
12
13
14
15
16
17
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