MPC564MZP56 Freescale Semiconductor, MPC564MZP56 Datasheet - Page 764

• Manufacturer Part Number: MPC564MZP56
• Description: IC MCU 512K FLASH 56MHZ 388-BGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC564MZP56

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 56MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 56
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 388-BGA
• Core: PowerPC
• Processor Series: MPC5xx
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 56 MHz
• Data Ram Size: 32 KB
• On-chip Adc: Yes
• Number Of Programmable I/os: 56
• Number Of Timers: 2
• Operating Supply Voltage: 0 V to 5 V
• Mounting Style: SMD/SMT
• A/d Bit Size: 10 bit
• A/d Channels Available: 32
• Height: 1.95 mm
• Interface Type: CAN, JTAG, QSPI, SCI, SPI, UART
• Length: 27 mm
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Supply Voltage (max): 2.7 V, 5.25 V
• Supply Voltage (min): 2.5 V, 4.75 V
• Width: 27 mm
• For Use With: MPC564EVB - KIT EVAL FOR MPC561/562/563/564
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No RoHS Version Available

Modular Input/Output Subsystem (MIOS14)
If a 32-bit coherent operation is in progress when an edge (except for the first edge) is detected, the transfer
of data from B1 to B2 is deferred until the coherent operation is completed. At any time, the input level
present on the input signal can be read on the PIN bit.
The input pulse period is calculated by subtracting the value in data register B from the value in data
register A.
Figure 17-17
17.9.3.4
IC mode is selected by setting MODE[0:3] to 0b0011.
This mode is identical to the input period measurement mode (IPM) described above, with the exception
that the FLAG line is also activated at the occurrence of the first detected edge of the selected polarity. In
this mode the MDASM functions as a standard input capture function. In this case the value latched in
channel B can be ignored.
capture.
17-32
Counter Bus
Mode selection; EDPOL = 0 (Channel A capture on rising edge)
Input signal
Internal Register, not accessible to
Register B1
Register B2
Register A
FLAG bit
16-bit
Input Capture (IC) Mode
provides an example of how the MDASM can be used for input period measurement.
0x0500
0xxxxx
0xxxxx
0xxxxx
Figure 17-18
Figure 17-17. Input Period Measurement Example
Edge Trigger
MPC561/MPC563 Reference Manual, Rev. 1.2
0x1000
2
Rising
0x1000
0x1000
0xxxxx
1
3
provides an example of how the MDASM can be used for input
software
0x1100
0x1000
0x1000
0xxxxx
Period = Reg A -Reg B
2
Edge Trigger
0x1400
0x1400
0x1400
0x0400
Flag set
Flag set
Rising
3
1
FLAG reset
by software
0x1400
0x1400
0x1000
0x1525
Period = Reg A -Reg B
Freescale Semiconductor
2
Flag set
Edge Trigger
0x16A0
0x16A0
Flag set
0x1400
0x16A0
FLAG reset
by softwa re
Rising
3
1