MPC564MZP56 Freescale Semiconductor, MPC564MZP56 Datasheet - Page 410

• Manufacturer Part Number: MPC564MZP56
• Description: IC MCU 512K FLASH 56MHZ 388-BGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC564MZP56

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 56MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 56
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 388-BGA
• Core: PowerPC
• Processor Series: MPC5xx
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 56 MHz
• Data Ram Size: 32 KB
• On-chip Adc: Yes
• Number Of Programmable I/os: 56
• Number Of Timers: 2
• Operating Supply Voltage: 0 V to 5 V
• Mounting Style: SMD/SMT
• A/d Bit Size: 10 bit
• A/d Channels Available: 32
• Height: 1.95 mm
• Interface Type: CAN, JTAG, QSPI, SCI, SPI, UART
• Length: 27 mm
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Supply Voltage (max): 2.7 V, 5.25 V
• Supply Voltage (min): 2.5 V, 4.75 V
• Width: 27 mm
• For Use With: MPC564EVB - KIT EVAL FOR MPC561/562/563/564
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No RoHS Version Available

Memory Controller
10.3.1
Figure 10-7
this case CSx is connected directly to the chip enable (CE) of the memory device. The WE/BE[0:3] lines
are connected to the respective WE in the memory device where each WE/BE line corresponds to a
different data byte.
In
transaction are supplied by the OE and the WE/BE lines (if programmed as WE/BE). When the ACS bits
in the corresponding ORx register = 00, CS is asserted at the same time that the address lines are valid.
10-12
Figure
10-8, the CSx timing is the same as that of the address lines output. The strobes for the
Memory Devices Interface Example
describes the basic connection between the MPC561/MPC563 and a static memory device. In
If CSNT is set, the WE signal is negated a quarter of a clock earlier than
normal.
MPC5xx
Figure 10-7. GPCM–Memory Devices Interface
Address
WE/BE
MPC561/MPC563 Reference Manual, Rev. 1.2
Data
CSx
OE
NOTE
Address
CE
OE
WE
Data
Memory
Freescale Semiconductor