MPC564MZP56 Freescale Semiconductor, MPC564MZP56 Datasheet - Page 27

• Manufacturer Part Number: MPC564MZP56
• Description: IC MCU 512K FLASH 56MHZ 388-BGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC564MZP56

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 56MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 56
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 388-BGA
• Core: PowerPC
• Processor Series: MPC5xx
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 56 MHz
• Data Ram Size: 32 KB
• On-chip Adc: Yes
• Number Of Programmable I/os: 56
• Number Of Timers: 2
• Operating Supply Voltage: 0 V to 5 V
• Mounting Style: SMD/SMT
• A/d Bit Size: 10 bit
• A/d Channels Available: 32
• Height: 1.95 mm
• Interface Type: CAN, JTAG, QSPI, SCI, SPI, UART
• Length: 27 mm
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Supply Voltage (max): 2.7 V, 5.25 V
• Supply Voltage (min): 2.5 V, 4.75 V
• Width: 27 mm
• For Use With: MPC564EVB - KIT EVAL FOR MPC561/562/563/564
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No RoHS Version Available

20.3.3
20.3.4
20.3.5
20.4
20.4.1
20.4.2
20.4.3
20.4.4
20.4.5
20.4.6
20.5
21.0.1
21.1
21.1.1
21.2
21.2.1
21.2.1.1
21.2.1.2
21.2.1.3
21.2.1.4
21.2.2
21.2.3
21.2.3.1
21.2.4
21.3
21.3.1
21.3.2
21.3.3
21.3.3.1
21.3.4
21.3.5
21.3.6
21.3.6.1
21.3.7
21.3.7.1
21.3.7.2
21.3.7.3
Freescale Semiconductor
Paragraph
Number
DPTRAM Operation ..................................................................................................... 20-6
Multiple Input Signature Calculator (MISC) ................................................................ 20-8
UC3F Interface ............................................................................................................. 21-4
Programming Model ..................................................................................................... 21-5
UC3F Operation .......................................................................................................... 21-19
RAM Base Address Register (RAMBAR) ............................................................... 20-4
MISR High (MISRH) and MISR Low Registers (MISRL) ...................................... 20-5
MISC Counter (MISCNT) ........................................................................................ 20-6
Normal Operation ..................................................................................................... 20-6
Standby Operation .................................................................................................... 20-6
Reset Operation ......................................................................................................... 20-7
Stop Operation .......................................................................................................... 20-7
Freeze Operation ....................................................................................................... 20-7
TPU3 Emulation Mode Operation ............................................................................ 20-7
Features of the CDR3 Flash EEPROM (UC3F) ....................................................... 21-3
External Interface ...................................................................................................... 21-4
UC3F EEPROM Control Registers .......................................................................... 21-5
UC3F EEPROM Array Addressing ........................................................................ 21-15
UC3F EEPROM Shadow Row ............................................................................... 21-15
UC3F EEPROM 512-Kbyte Array Configuration .................................................. 21-19
Reset ........................................................................................................................ 21-19
Register Read and Write Operation ........................................................................ 21-20
Array Read Operation ............................................................................................. 21-20
Shadow Row Select Read Operation ...................................................................... 21-21
Array Program/Erase Interlock Write Operation .................................................... 21-21
High Voltage Operations ........................................................................................ 21-21
Programming .......................................................................................................... 21-21
Register Addressing .............................................................................................. 21-5
UC3F EEPROM Configuration Register (UC3FMCR) ....................................... 21-5
UC3F EEPROM Extended Configuration Register (UC3FMCRE) ..................... 21-8
UC3F EEPROM High Voltage Control Register (UC3FCTL) .......................... 21-11
Reset Configuration Word (UC3FCFIG) ........................................................... 21-16
Array On-Page Read Operation .......................................................................... 21-21
Overview of Program/Erase Operation .............................................................. 21-21
Program Sequence .............................................................................................. 21-22
Program Shadow Information ............................................................................. 21-24
Program Suspend ................................................................................................ 21-25
MPC561/MPC563 Reference Manual, Rev. 1.2
CDR3 Flash (UC3F) EEPROM
Contents
Chapter 21
Title
Number
Page
xxvii