MPC564MZP56 Freescale Semiconductor, MPC564MZP56 Datasheet - Page 268

• Manufacturer Part Number: MPC564MZP56
• Description: IC MCU 512K FLASH 56MHZ 388-BGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC564MZP56

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 56MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 56
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 388-BGA
• Core: PowerPC
• Processor Series: MPC5xx
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 56 MHz
• Data Ram Size: 32 KB
• On-chip Adc: Yes
• Number Of Programmable I/os: 56
• Number Of Timers: 2
• Operating Supply Voltage: 0 V to 5 V
• Mounting Style: SMD/SMT
• A/d Bit Size: 10 bit
• A/d Channels Available: 32
• Height: 1.95 mm
• Interface Type: CAN, JTAG, QSPI, SCI, SPI, UART
• Length: 27 mm
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Supply Voltage (max): 2.7 V, 5.25 V
• Supply Voltage (min): 2.5 V, 4.75 V
• Width: 27 mm
• For Use With: MPC564EVB - KIT EVAL FOR MPC561/562/563/564
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No RoHS Version Available

System Configuration and Protection
6.2.2.1.2
The internal memory map register (IMMR) is a register located within the MPC561/MPC563 special
register space. The IMMR contains identification of a specific device as well as the base for the internal
memory map. Based on the value read from this register, software can deduce availability and location of
any on-chip system resources.
This register can be read by the mfspr instruction. The ISB field can be written by the mtspr instruction.
The PARTNUM and MASKNUM fields are mask programmed and cannot be changed.
6-28
1
2
1
2
The reset value is 101 for MPC561 and 110 for MPC563.
The reset value is a reset configuration word value extracted from the indicated bits of the internal data bus. Refer to
HRESET
HRESET
MLRC
Section 7.5.2, “Hard Reset Configuration Word
Operates as MODCK1 during reset.
This is true if MTSC is reset to 0. Otherwise, IRQ2/CR/SGPIOC2/MTS will function as MTS.
00
01
10
11
Field
Field
Addr
MSB
SGPIOC0/
SGPIOC0
16
0
0
MDO4
Internal Memory Map Register (IMMR)
IRQ0/
IRQ0
IRQ0
IRQ0
17
0
1
0000
—
Table 6-11. Multi-Level Reservation Control Pin Configuration
18
1
2
IRQ1/RSV/
SGPIOC1
Figure 6-13. Internal Memory Mapping Register (IMMR)
SGPIOC1
IRQ1
IRQ1
RSV
19
1
3
PARTNUM
MPC561/MPC563 Reference Manual, Rev. 1.2
FLEN
ID20
20
0
4
SGPIOC2/MTS
1
SGPIOC2
SGPIOC2
IRQ2/CR/
IRQ2
CR
X
21
(RCW).”
5
1
2
00
—
2
2
2
X
22
6
1
Pin Function
RETRY /SGPIOC3
ID23
SPR 638
X
—
23
7
1
KR/RETRY
KR/RETRY
SGPIOC3
IRQ3/KR/
2
IRQ3
24
8
25
9
0000
—
IRQ4/AT2/
SGPIOC4
SGPIOC4
Read-Only Fixed Value
10
26
IRQ4
AT2
AT2
MASKNUM
11
27
SGPIOC5/MODCK1
12
28
SGPIOC5/MODCK1
SGPIOC5/MODCK1
Freescale Semiconductor
IRQ5/ MODCK1
ID[28:30]
IRQ5/MODCK1
ISB
13
29
IRQ5/
1
14
30
LSB
—
15
31
0
1