MPC564MZP56 Freescale Semiconductor, MPC564MZP56 Datasheet - Page 1164

• Manufacturer Part Number: MPC564MZP56
• Description: IC MCU 512K FLASH 56MHZ 388-BGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC564MZP56

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 56MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 56
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 388-BGA
• Core: PowerPC
• Processor Series: MPC5xx
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 56 MHz
• Data Ram Size: 32 KB
• On-chip Adc: Yes
• Number Of Programmable I/os: 56
• Number Of Timers: 2
• Operating Supply Voltage: 0 V to 5 V
• Mounting Style: SMD/SMT
• A/d Bit Size: 10 bit
• A/d Channels Available: 32
• Height: 1.95 mm
• Interface Type: CAN, JTAG, QSPI, SCI, SPI, UART
• Length: 27 mm
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Supply Voltage (max): 2.7 V, 5.25 V
• Supply Voltage (min): 2.5 V, 4.75 V
• Width: 27 mm
• For Use With: MPC564EVB - KIT EVAL FOR MPC561/562/563/564
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No RoHS Version Available

TPU3 ROM Functions
D.6
The UART uses one or two TPU3 channels to provide asynchronous communications. Data word length
is programmable from 1 to 14 bits. The function supports detection or generation of even, odd, and no
parity. Baud rate is freely programmable and can be higher than 100 Kbaud. Eight bidirectional UART
channels running in excess of 9600 baud can be implemented on the TPU3. See Freescale TPU3
Progamming Note Asynchronous Serial Interface TPU Function (UART), (TPUPN07/D).
Figure D-7
receiving modes.
D-12
Universal Asynchronous Receiver/Transmitter (UART)
and
Figure D-8
show all of the host interface areas for the UART function in transmitting and
MPC561/MPC563 Reference Manual, Rev. 1.2
Figure D-6. FQM Parameters
CONTROL BITS
See
PRAM Address Offset Map.
Table 19-24
Freescale Semiconductor
for the