MPC564MZP56 Freescale Semiconductor, MPC564MZP56 Datasheet - Page 376

• Manufacturer Part Number: MPC564MZP56
• Description: IC MCU 512K FLASH 56MHZ 388-BGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC564MZP56

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 56MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 56
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 388-BGA
• Core: PowerPC
• Processor Series: MPC5xx
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 56 MHz
• Data Ram Size: 32 KB
• On-chip Adc: Yes
• Number Of Programmable I/os: 56
• Number Of Timers: 2
• Operating Supply Voltage: 0 V to 5 V
• Mounting Style: SMD/SMT
• A/d Bit Size: 10 bit
• A/d Channels Available: 32
• Height: 1.95 mm
• Interface Type: CAN, JTAG, QSPI, SCI, SPI, UART
• Length: 27 mm
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Supply Voltage (max): 2.7 V, 5.25 V
• Supply Voltage (min): 2.5 V, 4.75 V
• Width: 27 mm
• For Use With: MPC564EVB - KIT EVAL FOR MPC561/562/563/564
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No RoHS Version Available

External Bus Interface
Figure 9-27
9-36
1
2
External master will be granted external bus ownership if EARP is greater than the internal access priority.
Parked access is instruction or data access from the RCPU which is initiated on the internal bus without
requesting it first in order to improve performance.
Instruction access
External access
Parked access
illustrates the internal finite-state machine that implements the arbiter protocol.
Data access
Table 9-4. Priority Between Internal and External Masters over External Bus
Type
No Longer
Needs the Bus
MPC500 Device
BR = 1
External Device With Higher
Priority than the Current Internal
Bus Master Requests the Bus
BG = 1
BB = three
state
2
IDLE
External Master
Requests Bus
BR = 0
Figure 9-27. Internal Bus Arbitration State Machine
MPC561/MPC563 Reference Manual, Rev. 1.2
external → external/internal
Internal → external
Internal → external
Internal → external
Direction
MCU Needs
the Bus
External Master
Release Bus
Device Owner
MPC500
External
BG = 0
BB = three
state
BG = 1
BB = 0
Owner
Internal Master With Higher
Priority than the External Device
Requires the Bus
EARP (could be programmed to 0 – 7)
MPC500 Device
MPC500 Device
Still Needs
the Bus
BB = 1
Bus
MPC500
BG = 1
BB = three
state
Device
Priority
Wait
0
3
4
BB = 0
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