MPC564MZP56 Freescale Semiconductor, MPC564MZP56 Datasheet - Page 148

• Manufacturer Part Number: MPC564MZP56
• Description: IC MCU 512K FLASH 56MHZ 388-BGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC564MZP56

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 56MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 56
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 388-BGA
• Core: PowerPC
• Processor Series: MPC5xx
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 56 MHz
• Data Ram Size: 32 KB
• On-chip Adc: Yes
• Number Of Programmable I/os: 56
• Number Of Timers: 2
• Operating Supply Voltage: 0 V to 5 V
• Mounting Style: SMD/SMT
• A/d Bit Size: 10 bit
• A/d Channels Available: 32
• Height: 1.95 mm
• Interface Type: CAN, JTAG, QSPI, SCI, SPI, UART
• Length: 27 mm
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Supply Voltage (max): 2.7 V, 5.25 V
• Supply Voltage (min): 2.5 V, 4.75 V
• Width: 27 mm
• For Use With: MPC564EVB - KIT EVAL FOR MPC561/562/563/564
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No RoHS Version Available

Central Processing Unit
3.4
The PowerPC ISA architecture provides independent floating-point, integer, load/store, and branch
processing execution units, making it possible to implement advanced features such as look-ahead
operations. For example, since branch instructions do not depend on GPRs, branches can often be resolved
early, eliminating stalls caused by taken branches.
Table 3-1
3-4
Branch processing unit (BPU)
Independent Execution Units
Load/store unit (LSU)
summarizes the RCPU execution units.
Unit
Instruction Address Generator
CC unit
Execution Units and Registers Files
MPC561/MPC563 Reference Manual, Rev. 1.2
Includes the implementation of all branch instructions.
Includes implementation of all load and store instructions, whether defined as
part of the integer processor or the floating-point processor.
Table 3-1. RCPU Execution Units
Figure 3-2. Sequencer Data Path
Instruction Memory System
Evaluation
Condition
Branch
Description
Instruction Buffer
Instruction
Pre-fetch
Queue
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Freescale Semiconductor
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