MPC564MZP56 Freescale Semiconductor, MPC564MZP56 Datasheet - Page 817

IC MCU 512K FLASH 56MHZ 388-BGA

MPC564MZP56

Manufacturer Part Number
MPC564MZP56
Description
IC MCU 512K FLASH 56MHZ 388-BGA
Manufacturer
Freescale Semiconductor
Series
MPC5xxr
Datasheets

Specifications of MPC564MZP56

Core Processor
PowerPC
Core Size
32-Bit
Speed
56MHz
Connectivity
CAN, EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
56
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 2.7 V
Data Converters
A/D 32x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
388-BGA
Core
PowerPC
Processor Series
MPC5xx
Data Bus Width
32 bit
Maximum Clock Frequency
56 MHz
Data Ram Size
32 KB
On-chip Adc
Yes
Number Of Programmable I/os
56
Number Of Timers
2
Operating Supply Voltage
0 V to 5 V
Mounting Style
SMD/SMT
A/d Bit Size
10 bit
A/d Channels Available
32
Height
1.95 mm
Interface Type
CAN, JTAG, QSPI, SCI, SPI, UART
Length
27 mm
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Supply Voltage (max)
2.7 V, 5.25 V
Supply Voltage (min)
2.5 V, 4.75 V
Width
27 mm
For Use With
MPC564EVB - KIT EVAL FOR MPC561/562/563/564
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No RoHS Version Available

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18.4.1.1
The PPM module cannot, and should not, be put into stop mode while either the transmit or receive
operation is enabled in PPMPCR[ENTX] and/or PPMPCR[ENRX]. Furthermore, it should not be put into
stop mode if it is operating in continuous mode. In this case it should be switched to single transfer mode
first.
The following steps should be taken to ensure that stop mode is entered safely and without loss of data:
Freescale Semiconductor
1. If the PPM is operating in continous mode
2. If the PPM is enabled for transmit or receive
3. If the PPM is not enabled for transmit or receive
4. Set PPMMCR[STOP]
Bits
9:15
1:7
0
8
— switch to single transfer mode by clearing PPMPCR[CM]=0.
— set PPMPCR[STR] (TDM or SPI mode)
— Disable both PPMPCR[ENTX] and PPMPCR[ENRX]
— Wait until PPMPCR[STR] is cleared by the PPM module. This will be done when the next data
— Clear PPMPCR[STR] if necessary
When PPMMCR[STOP] is set, the PPM module enters stop mode and the PPM module clocks will
be stopped. While in stop mode, none of the PPM registers will be accessible, except for the
PPMPCR register.
If the STOP bit is clear, stop mode is disabled.
frame has been sent or received.
Entering Stop Mode
Name
STOP
SUPV
Stop Mode Enable. When the STOP bit is set and the PPM enters Stop Mode, the PPM module
clocks will be stopped. The PPM will only respond to accesses to the PPMMCR register. The
STOP bit can only be set when the PPM is disabled, (i.e., PPMPCR[ENTX] = 0 and
PPMPCR[ENRX] = 0). Writing to the STOP bit while either TX or RX is enabled will result in a
TEA (bus error access).
0 PPM clocks enabled
1 PPM clock disabled – PPM in Stop Mode.
Reserved
Supervisor/User Data Space. The SUPV bit places the PPM registers in either Supervisor or
User Data Space.
0 Access to PPMMCR, TX_CONFIG1/2, RX_CONFIG1/2 is restricted to supervisor-only.
1 All PPM registers are accessible in supervisor-only data space.
Reserved
Access to all other PPM registers is unrestricted.
MPC561/MPC563 Reference Manual, Rev. 1.2
Table 18-2. PPMMCR Bit Descriptions
Description
Peripheral Pin Multiplexing (PPM) Module
18-11

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