MPC564MZP56 Freescale Semiconductor, MPC564MZP56 Datasheet - Page 456

• Manufacturer Part Number: MPC564MZP56
• Description: IC MCU 512K FLASH 56MHZ 388-BGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC564MZP56

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 56MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 56
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 388-BGA
• Core: PowerPC
• Processor Series: MPC5xx
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 56 MHz
• Data Ram Size: 32 KB
• On-chip Adc: Yes
• Number Of Programmable I/os: 56
• Number Of Timers: 2
• Operating Supply Voltage: 0 V to 5 V
• Mounting Style: SMD/SMT
• A/d Bit Size: 10 bit
• A/d Channels Available: 32
• Height: 1.95 mm
• Interface Type: CAN, JTAG, QSPI, SCI, SPI, UART
• Length: 27 mm
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Supply Voltage (max): 2.7 V, 5.25 V
• Supply Voltage (min): 2.5 V, 4.75 V
• Width: 27 mm
• For Use With: MPC564EVB - KIT EVAL FOR MPC561/562/563/564
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No RoHS Version Available

U-Bus to IMB3 Bus Interface (UIMB)
12.2
12.3
The clock module within the UIMB interface generates the IMB3 clock. The IMB3 clock is the main
timing reference used within the IMB3 modules.
The IMB3 clock is generated based on the STOP and HSPEED bits in the UIMB module configuration
register (UMCR). If the STOP = 1, the IMB3 clock is not generated. If the STOP = 0 and the HSPEED =
0, the IMB3 clock is generated as the inversion of the internal system clock. This is the same frequency as
the CLKOUT if SCCR[EBDF] = 0b00 – full speed external bus. (See
then the IMB3 clock is one-half of the internal system frequency. (See
12-2
UIMB Block Diagram
Clock Module
STOP
The user should not perform instruction fetches from modules on the IMB3.
U-bus
0
0
1
Figure 12-1. UIMB Interface Module Block Diagram
Table 12-1. STOP and HSPEED Bit Functionality
HSPEED
MPC561/MPC563 Reference Manual, Rev. 1.2
X
0
1
IMB3 bus frequency is the same as U-bus frequency.
IMB3 bus frequency is half that of the U-bus frequency.
IMB3 clock is not generated.
Address
Decode
Interface
U-bus
Data
Mux
WARNING
Clock Control
Scan Control
Synchronizer
Interrupt
Interface
IMB3
Functionality
Figure
Figure
12-2.) If the HSPEED = 1,
12-3.)
IMB3
Freescale Semiconductor