MPC564MZP56 Freescale Semiconductor, MPC564MZP56 Datasheet - Page 895

• Manufacturer Part Number: MPC564MZP56
• Description: IC MCU 512K FLASH 56MHZ 388-BGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC564MZP56

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 56MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 56
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 388-BGA
• Core: PowerPC
• Processor Series: MPC5xx
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 56 MHz
• Data Ram Size: 32 KB
• On-chip Adc: Yes
• Number Of Programmable I/os: 56
• Number Of Timers: 2
• Operating Supply Voltage: 0 V to 5 V
• Mounting Style: SMD/SMT
• A/d Bit Size: 10 bit
• A/d Channels Available: 32
• Height: 1.95 mm
• Interface Type: CAN, JTAG, QSPI, SCI, SPI, UART
• Length: 27 mm
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Supply Voltage (max): 2.7 V, 5.25 V
• Supply Voltage (min): 2.5 V, 4.75 V
• Width: 27 mm
• For Use With: MPC564EVB - KIT EVAL FOR MPC561/562/563/564
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No RoHS Version Available

21.3.11.4 Switching The UC3F EEPROM Censorship
There are three states of censorship that CENSOR[0:1] can select. These are—cleared censorship, no
censorship (two states) and information censorship. These three states, state values, transitions, and state
of censorship are shown in
Freescale Semiconductor
5. Read the UC3FCTL register until HVS = 0.
6. Read the UC3FCTL register. Confirm PEGOOD = 1.
7. Write EHV = 0 in the UC3FCTL register.
8. Write SES = 0 and CSC = 0.
T4
Information Censorship
The values of the EPEE and B0EPEE inputs are latched with the assertion
of EHV to determine the array protection state for the clear censor
operation. It is assumed that the EPEE and B0EPEE inputs are setup prior
to the assertion of EHV. If EPEE and B0EPEE are not enabled for erase, the
CENSOR[0:1] bits may not be cleared.
Cleared Censorship
No Censorship
Figure
Figure 21-11. Censorship States and Transitions
MPC561/MPC563 Reference Manual, Rev. 1.2
21-11.
CENSOR[0:1] = 01
T3
Data
Data
Unknown
NOTE
CENSOR[0:1] = 11
CENSOR[0:1] = 00
Data
Data
Data
T2
T1
CENSOR[0:1] = 10
T3
Data
Data
CDR3 Flash (UC3F) EEPROM
T3
21-33