UPD70F3453GC-8EA-A Renesas Electronics America, UPD70F3453GC-8EA-A Datasheet - Page 140

• Manufacturer Part Number: UPD70F3453GC-8EA-A
• Description: MCU 32BIT 128KB FLASH 100LQFP
• Manufacturer: Renesas Electronics America
• Series: V850E/Ix3r

Specifications of UPD70F3453GC-8EA-A

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 56
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 5.5 V
• Data Converters: A/D 10x12b, 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

138
(1) Registers
Note Valid only in the V850E/IG3.
Caution When using a port input pin and analog input pin (ANI2n) together, be sure to set (1) the bit
Remark
Note Valid only in the V850E/IG3.
Cautions 1. Do not change to the port mode using A/D converter 2 during A/D conversion.
Remark
(a) Port 7 register (P7)
(b) Port 7 mode control register (PMC7)
With the V850E/IF3, the read value of this register is undefined.
With the V850E/IF3, be sure to set these bits to 0.
2. The PMC7 register enables or disables reading of the P7 register. When the PMC7n bit = 1,
(PMC7n) of the PMC7 register to be used as the ANI2n pin.
V850E/IF3: n = 0 to 3
V850E/IG3: n = 0 to 7
V850E/IF3: n = 0 to 3
V850E/IG3: n = 0 to 7
PMC7
the input buffer does not turn on even when the P7 register is read. In this case, the read
value of the P7n bit is fixed to the low level (V850E/IF3: n = 0 to 3, V850E/IG3: n = 0 to 7).
This is to prevent through-current that may flow when the ANI2n input (intermediate level)
is read.
After reset: Undefined
After reset: 00H
P7
PMC77
P77
PMC7n
P7n
0
1
0
1
Note
Note
PMC76
Input low level.
Input high level.
Input
ANI2n
P76
R/W
Note
port (reading P7n enabled. Input buffer is on when this bit is read)
Note
input (reading P7n disabled. Input buffer is off when this bit is read)
R
CHAPTER 4 PORT FUNCTIONS
PMC75
Address: FFFFFBB8H
P75
User’s Manual U18279EJ3V0UD
Address: FFFFFBB0H
Specification of operating mode of P7n pin
Note
Note
PMC74
P74
Note
Control of input data
Note
PMC73
P73
PMC72
P72
PMC71
P71
PMC70
P70