UPD70F3453GC-8EA-A Renesas Electronics America, UPD70F3453GC-8EA-A Datasheet - Page 624

• Manufacturer Part Number: UPD70F3453GC-8EA-A
• Description: MCU 32BIT 128KB FLASH 100LQFP
• Manufacturer: Renesas Electronics America
• Series: V850E/Ix3r

Specifications of UPD70F3453GC-8EA-A

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 56
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 5.5 V
• Data Converters: A/D 10x12b, 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

12.3 Control Registers
622
A/D converters 0 and 1 are controlled by the following registers.
• A/D converter n scan mode register (ADnSCM)
• A/D converter n scan mode register L (ADnSCML)
• A/D converter n scan mode register H (ADnSCMH)
• A/D converter n conversion time control register (ADnCTC)
• A/D converter n conversion channel specification register (ADnCHEN)
• A/D converter n conversion channel specification register L (ADnCHENL)
• A/D converter n conversion channel specification register H (ADnCHENH)
• A/D converter n control register (ADnCTL0)
• A/D converter n trigger select register (ADnTSEL)
• A/D converter n channel specification registers 1 and 2 (ADnCH1, ADnCH2)
• A/D converter n flag register (ADnFLG)
• A/D converter n flag buffer register (ADnFLGB)
• A/DLDTRG1 input select register (ADLTS1)
• A/DLDTRG2 input select register (ADLTS2)
• A/D converter n clock select register (ADnOCKS)
• A/D trigger falling edge specification register (ADTF)
• A/D trigger rising edge specification register (ADTR)
• Operational amplifier n control register 0 (OPnCTL0)
• Comparator n control registers 0 to 3 (CMPnCTL0 to CMPnCTL3)
• Comparator output digital noise elimination registers nL, nF (CMPNFCnL, CMPNFCnF)
• Comparator output interrupt rising edge specification register (CMPOR)
• Comparator output interrupt falling edge specification register (CMPOF)
The following registers are also used.
• A/Dn conversion result registers 0 to 15 (ADnCR0 to ADnCR15)
• A/Dn conversion result registers 0H to 15H (ADnCR0H to ADnCR15H)
• A/Dn conversion result extension registers 0 to 4 (ADnECR0 to ADnECR4)
• A/Dn conversion result extension registers 0H to 4H (ADnECR0H to ADnECR4H)
CHAPTER 12 A/D CONVERTERS 0 AND 1
User’s Manual U18279EJ3V0UD