UPD70F3453GC-8EA-A Renesas Electronics America, UPD70F3453GC-8EA-A Datasheet - Page 323

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UPD70F3453GC-8EA-A

Manufacturer Part Number
UPD70F3453GC-8EA-A
Description
MCU 32BIT 128KB FLASH 100LQFP
Manufacturer
Renesas Electronics America
Series
V850E/Ix3r
Datasheet

Specifications of UPD70F3453GC-8EA-A

Core Processor
RISC
Core Size
32-Bit
Speed
64MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
56
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3.5 V ~ 5.5 V
Data Converters
A/D 10x12b, 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3453GC-8EA-A
Manufacturer:
Renesas Electronics America
Quantity:
10 000
7.6.1
TABnCCR0 register if the TABnCTL0.TABnCE bit is set to 1. A PWM waveform with a duty factor of 50% whose half
cycle is equal to the interval can be output from the TOBn0 pin.
TABnCCR1 to TABnCCR3 registers is transferred to the CCR1 to CCR3 buffer registers and, when the count value of
the 16-bit counter matches the value of the CCR1 to CCR3 buffer registers, compare match interrupt request signals
(INTTBnCC1 to INTTBnCC3) are generated. In addition, a PWM waveform with a duty factor of 50%, which is
inverted when the INTTBnCC1 to INTTBnCC3 signals are generated, can be output from the TOBn1 to TOBn3 pins.
In the interval timer mode, an interrupt request signal (INTTBnCC0) is generated at the interval set by the
The TABnCCR1 to TABnCCR3 registers are not used in the interval timer mode. However, the set value of the
The value of the TABnCCR1 to TABnCCR3 registers can be rewritten even while the timer is operating.
Remark
Remark
Interval timer mode (TABnMD2 to TABnMD0 bits = 000)
TABnCCR0 register
INTTBnCC0 signal
TOBn0 pin output
Count clock
n = 0, 1
n = 0, 1
selection
16-bit counter
TABnCE bit
FFFFH
0000H
TABnCE bit
Figure 7-7. Basic Timing of Operation in Interval Timer Mode
CHAPTER 7 16-BIT TIMER/EVENT COUNTER AB (TAB)
Interval (D
Figure 7-6. Interval Timer Configuration
D
User’s Manual U18279EJ3V0UD
0
0
+ 1) Interval (D
CCR0 buffer register
TABnCCR0 register
16-bit counter
Clear
D
0
Match signal
0
+ 1) Interval (D
D
0
D
0
0
+ 1) Interval (D
controller
Output
INTTBnCC0 signal
D
0
0
+ 1)
TOBn0 pin
321

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