UPD70F3453GC-8EA-A Renesas Electronics America, UPD70F3453GC-8EA-A Datasheet - Page 354

• Manufacturer Part Number: UPD70F3453GC-8EA-A
• Description: MCU 32BIT 128KB FLASH 100LQFP
• Manufacturer: Renesas Electronics America
• Series: V850E/Ix3r

Specifications of UPD70F3453GC-8EA-A

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 56
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 5.5 V
• Data Converters: A/D 10x12b, 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

352
In order to transfer data from the TABnCCRa register to the CCRa buffer register, the TABnCCR1 register
must be written.
To change both the cycle and active level width of the PWM waveform at this time, first set the cycle to the
TABnCCR0 register, set the active level width to the TABnCCR2 and TABnCCR3 registers, and then set an
active level to the TABnCCR1 register.
To change only the cycle of the PWM waveform, first set the cycle to the TABnCCR0 register, and then
write the same value (same as preset value of the TABnCCR1 register) to the TABnCCR1 register.
To change only the active level width (duty factor) of the PWM waveform, first set an active level to the
TABnCCR2 and TABnCCR3 registers and then set an active level to the TABnCCR1 register.
To change only the active level width (duty factor) of the PWM waveform output by the TOBn1 pin, only the
TABnCCR1 register has to be set.
To change only the active level width (duty factor) of the PWM waveform output by the TOBn2 and TOBn3
pins, first set an active level width to the TABnCCR2 and TABnCCR3 registers, and then write the same
value (same as preset value of the TABnCCR1 register) to the TABnCCR1 register.
After data is written to the TABnCCR1 register, the value written to the TABnCCRa register is transferred to
the CCRa buffer register in synchronization with clearing of the 16-bit counter, and is used as the value
compared with the 16-bit counter.
To write the TABnCCR0 to TABnCCR3 registers again after writing the TABnCCR1 register once, do so
after the INTTBnCC0 signal is generated. Otherwise, the value of the CCRa buffer register may become
undefined because timing of transferring data from the TABnCCRa register to the CCRa buffer register
conflicts with writing the TABnCCRa register.
Remark
n = 0, 1
a = 0 to 3
CHAPTER 7 16-BIT TIMER/EVENT COUNTER AB (TAB)
User’s Manual U18279EJ3V0UD