UPD70F3453GC-8EA-A Renesas Electronics America, UPD70F3453GC-8EA-A Datasheet - Page 570

• Manufacturer Part Number: UPD70F3453GC-8EA-A
• Description: MCU 32BIT 128KB FLASH 100LQFP
• Manufacturer: Renesas Electronics America
• Series: V850E/Ix3r

Specifications of UPD70F3453GC-8EA-A

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 56
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 5.5 V
• Data Converters: A/D 10x12b, 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

568
(2) PWM output of 0%/100%
Remark
<1> 0% output is selected by the valley interrupt (without a match with the 16-bit counter).
<2> 0% output is canceled by the crest interrupt (without a match with the 16-bit counter).
<3> 0% output is selected by the crest interrupt (with a match with the 16-bit counter).
<4> 0% output is canceled by the valley interrupt (without a match with the 16-bit counter).
Remark
The V850E/IF3 and V850E/IG3 are capable of 0% waveform output and 100% waveform output for PWM
output.
A low level is continuously output from TOBnTm pin as the 0% waveform output. A high level is continuously
output from TOBnTm pin as the 100% waveform output.
The 0% waveform is output by setting the TABnCCRm register to “M + 1” when the TABnCCR0 register = M.
The 100% waveform is output by setting the TABnCCRm register to “0000H”.
Rewriting the TABnCCRm register is enabled while the timer is operating, and 0% waveform output or 100%
waveform output can be selected at the point of the crest interrupt (INTTBnCC0) and valley interrupt
(INTTBnOV).
The valley interrupt forcibly lowers the timer output. This produces the 0% output.
The crest interrupt forcibly raises the timer output. This cancels the 0% output.
The crest interrupt forcibly raises the timer output, but lowering the timer output takes precedence when
the value of the TABnCCRm register matches the value of the 16-bit counter. As a result, the 0% wave is
output.
The valley interrupt forcibly lowers the timer output. This cancels the 0% output.
of timer output
buffer register
Forced timing
TABnCCR0
TABnCCR1
n = 0, 1, m = 1 to 3
pin output
pin output
TOBnT1
TOBnB1
means forced raising and means forced lowering.
register
register
counter
CCR1
16-bit
0000H
Figure 10-9. 0% PWM Output Waveform (With Dead Time)
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CHAPTER 10 MOTOR CONTROL FUNCTION
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<1>
User’s Manual U18279EJ3V0UD
M + 1
0% output
M + 1
M
<2>
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<3>
0% output
M + 1
M + 1
<4>
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