UPD70F3453GC-8EA-A Renesas Electronics America, UPD70F3453GC-8EA-A Datasheet - Page 712

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UPD70F3453GC-8EA-A

Manufacturer Part Number
UPD70F3453GC-8EA-A
Description
MCU 32BIT 128KB FLASH 100LQFP
Manufacturer
Renesas Electronics America
Series
V850E/Ix3r
Datasheet

Specifications of UPD70F3453GC-8EA-A

Core Processor
RISC
Core Size
32-Bit
Speed
64MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
56
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3.5 V ~ 5.5 V
Data Converters
A/D 10x12b, 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3453GC-8EA-A
Manufacturer:
Renesas Electronics America
Quantity:
10 000
710
(4) Software trigger one-shot scan mode operations
Remark
(1) The AD2CE bit = 1 (enable)
(2) The ANI20 pin is A/D-converted
(3) The conversion result is stored in the AD2CR0 register
(4) The ANI21 pin is A/D-converted
(5) The conversion result is stored in the AD2CR1 register
Note Set by the AD2S.AD2S0 to AD2S.AD2S2 bits.
Remark
In this mode, pins up to the analog input pin (ANI2n) specified by the AD2S register from the ANI20 pin are
selected sequentially, and A/D conversion is executed continuously. The A/D conversion results are stored in
the AD2CRn register corresponding to the analog input pin.
When conversion of all the specified analog input pin ends, the A/D2 conversion end interrupt request signal
(INTAD2) is generated. After A/D conversion ends, the conversion operation is stopped.
If the AD2M0.AD2CE bit is set to 1, A/D conversion can be restarted.
This mode is suitable for applications in which multiple analog inputs are constantly monitored.
Analog Input Pin
ANI20
ANI2n
.
.
.
Figure 13-11. Operation Example of Software Trigger One-Shot Scan Mode: V850E/IG3
AD2M0
This is an operation example with the following setting.
AD2M0.AD2MD1 and AD2M0.AD2MD0 bits = 11, AD2S.AD2S2 to AD2S.AD2S0 bits = 010
Note
V850E/IF3: n = 0 to 3
V850E/IG3: n = 0 to 7
AD2CR0
AD2CRn
.
.
.
A/D Conversion Result Register
ANI20
ANI21
ANI22
ANI23
ANI24
ANI25
ANI26
ANI27
CHAPTER 13 A/D CONVERTER 2
User’s Manual U18279EJ3V0UD
(6) The ANI22 pin is A/D-converted
(7) The conversion result is stored in the AD2CR2 register
(8) The AD2M0.AD2EF bit = 0
(9) The INTAD2 interrupt request signal is generated
A/D converter 2
AD2CR0
AD2CR1
AD2CR2
AD2CR3
AD2CR4
AD2CR5
AD2CR6
AD2CR7

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