UPD70F3453GC-8EA-A Renesas Electronics America, UPD70F3453GC-8EA-A Datasheet - Page 81

• Manufacturer Part Number: UPD70F3453GC-8EA-A
• Description: MCU 32BIT 128KB FLASH 100LQFP
• Manufacturer: Renesas Electronics America
• Series: V850E/Ix3r

Specifications of UPD70F3453GC-8EA-A

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 56
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 5.5 V
• Data Converters: A/D 10x12b, 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

3.4.7
FFFFF004H
FFFFF024H
FFFFF044H
FFFFF066H
FFFFF06EH
FFFFF080H
FFFFF082H
FFFFF084H
FFFFF086H
FFFFF088H
FFFFF08AH
FFFFF08CH
FFFFF08EH
FFFFF090H
FFFFF092H
FFFFF094H
FFFFF096H
FFFFF098H
FFFFF09AH
FFFFF09CH
FFFFF09EH
FFFFF0C0H
FFFFF0C2H
FFFFF0C4H
FFFFF0C6H
FFFFF0D0H
FFFFF0D2H
FFFFF0D4H
FFFFF0D6H
FFFFF0E0H
FFFFF0E2H
FFFFF0E4H
FFFFF0E6H
FFFFF004H
FFFFF005H
FFFFF024H
FFFFF025H
FFFFF044H
FFFFF045H
Address
On-chip peripheral I/O registers
Port DL register
Port DLL register
Port DLH register
Port DL mode register
Port DL mode register L
Port DL mode register H
Port DL mode control register
Port DL mode control register L
Port DL mode control register H
Bus size configuration register
System wait control register
DMA source address register 0L
DMA source address register 0H
DMA destination address register 0L
DMA destination address register 0H
DMA source address register 1L
DMA source address register 1H
DMA destination address register 1L
DMA destination address register 1H
DMA source address register 2L
DMA source address register 2H
DMA destination address register 2L
DMA destination address register 2H
DMA source address register 3L
DMA source address register 3H
DMA destination address register 3L
DMA destination address register 3H
DMA transfer count register 0
DMA transfer count register 1
DMA transfer count register 2
DMA transfer count register 3
DMA addressing control register 0
DMA addressing control register 1
DMA addressing control register 2
DMA addressing control register 3
DMA channel control register 0
DMA channel control register 1
DMA channel control register 2
DMA channel control register 3
Function Register Name
CHAPTER 3 CPU FUNCTION
User’s Manual U18279EJ3V0UD
PDL
PDLL
PDLH
PMDL
PMDLL
PMDLH
PMCDL
PMCDLL
PMCDLH
BSC
VSWC
DSA0L
DSA0H
DDA0L
DDA0H
DSA1L
DSA1H
DDA1L
DDA1H
DSA2L
DSA2H
DDA2L
DDA2H
DSA3L
DSA3H
DDA3L
DDA3H
DBC0
DBC1
DBC2
DBC3
DADC0
DADC1
DADC2
DADC3
DCHC0
DCHC1
DCHC2
DCHC3
Symbol
R/W
R/W
1
√
√
√
√
√
√
√
√
√
√
Manipulation
Bit Units for
8
√
√
√
√
√
√
√
√
√
√
√
16
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
Undefined
Undefined
Undefined
FFFFH
FFH
FFH
0000H
00H
00H
5555H
77H
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
0000H
0000H
0000H
0000H
00H
00H
00H
00H
After Reset
(1/14)
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