UPD70F3453GC-8EA-A Renesas Electronics America, UPD70F3453GC-8EA-A Datasheet - Page 615

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UPD70F3453GC-8EA-A

Manufacturer Part Number
UPD70F3453GC-8EA-A
Description
MCU 32BIT 128KB FLASH 100LQFP
Manufacturer
Renesas Electronics America
Series
V850E/Ix3r
Datasheet

Specifications of UPD70F3453GC-8EA-A

Core Processor
RISC
Core Size
32-Bit
Speed
64MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
56
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3.5 V ~ 5.5 V
Data Converters
A/D 10x12b, 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3453GC-8EA-A
Manufacturer:
Renesas Electronics America
Quantity:
10 000
ADTRG1/INTADT1
Remark
TABTADT10
TABTADT11
TABTADT01
Cautions 1. If there is noise at the analog input pins (ANI00 to ANI05, ANI10 to ANI17) or at the A/D
Trigger source selector in hardware trigger
ANI13/CREF1L
ANI14/CREF1F
ANI10/ANI15
ANI11/ANI16
ANI12/ANI17
f
f
f
XX
XX
XX
/2
/3
/4
mode (see Figure 12-6)
f
f
Buffer registers 0 to 4: A/D1 conversion result extension buffer registers 0 to 4
XX
AD01
: Peripheral clock
2. Do not apply a voltage outside the AV
: Basic clock
Input circuit (see Figure 12-4)
converter reference voltage input pins (AV
illegal conversion result.
Software processing will be needed to avoid a negative effect on the system from this
illegal conversion result.
An example of this software processing is shown below.
• Take the average result of a number of A/D conversions and use that as the A/D
• Execute a number of A/D conversions consecutively and use those results, omitting
• If an A/D conversion result that is judged to have generated a system malfunction is
input pins of A/D converters 0 and 1 (n = 0, 1).
conversion result.
any exceptional results that may have been obtained.
obtained, be sure to recheck the system malfunction before performing malfunction
processing.
noise eliminator
Edge detection/
CMPREF
Figure 12-2. Block Diagram of A/D Converter 1
CHAPTER 12 A/D CONVERTERS 0 AND 1
INTCMP1L
To high-impedance controller
of timer output for motor control
INTCMP1F
To high-impedance controller
of timer output for motor control
f
AD01
Sample & hold circuit
User’s Manual U18279EJ3V0UD
AD1CTL0
AD1TSEL
AD1CTC
Controller
AD1CH1
SSn
Internal bus
AD1SCM0
to AV
REFP0
AD1CH2
REFPn
, AV
AD1CHEN
REFP1
range to the pins that are used as
), that noise may generate an
approximation
register (SAR)
Successive
AD1CR15
AD1CR0
AD1CR1
AD1CR2
AD1CR3
AD1CR4
AD1CR5
:
Buffer register 0
Buffer register 1
Buffer register 2
Buffer register 3
Buffer register 4
comparator
Voltage
Array
AD1ECR0
AD1ECR1
AD1ECR2
AD1ECR3
AD1ECR4
INTAD1
AV
AV
AV
DD1
REFP1
SS1
613

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