UPD70F3453GC-8EA-A Renesas Electronics America, UPD70F3453GC-8EA-A Datasheet - Page 673

• Manufacturer Part Number: UPD70F3453GC-8EA-A
• Description: MCU 32BIT 128KB FLASH 100LQFP
• Manufacturer: Renesas Electronics America
• Series: V850E/Ix3r

Specifications of UPD70F3453GC-8EA-A

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 56
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 5.5 V
• Data Converters: A/D 10x12b, 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Remark
(1) AD0CE bit = 1 (enable)
(2) Trigger specified by AD0TSEL.AD0TRGSEL11
(3) Signal of ANI01 pin is A/D-converted
(4) Conversion result is stored in AD0CR0 register
(5) Signal of ANI01 pin is A/D-converted
(6) Conversion result is stored in AD0CR1 register
(7) Signal of ANI01 pin is A/D-converted
AD0TSEL.AD0TRGSEL11 and
AD0TSEL.AD0TRGSEL10 bits
AD0TRGCH16 to AD0TRGCH14 bits
AD0TRGCH12 to AD0TRGCH10 bits
A/D conversion result signals 11 to 0
Figure 12-20. Example of Operation in Conversion Channel Specification Mode: A/D Converter 0
and AD0TSEL.AD0TRGSEL10 bits is generated (10) Conversion result is stored in AD0CR3 register
This is an operation example when the AD0SCM.AD0PLM, AD0TRG1, and AD0TRG0 bits = 001,
AD0CTL0.AD0MD1
AD0CH1.AD0TRGCH12 to AD0CH1.AD0TRGCH10 bits = 001, and AD0CH1.AD0TRGCH16 to
AD0CH1.AD0TRGCH14 bits = 001.
Trigger specified by
Analog input pin selection
Selection trigger 1
AD0CR0 register
AD0CR1 register
AD0CR2 register
AD0CR3 register
INTAD0 signal
and
CHAPTER 12 A/D CONVERTERS 0 AND 1
AD0CTL0.AD0MD0
User’s Manual U18279EJ3V0UD
ANI00
ANI01
ANI02
ANI03
ANI04
ANI05
(×4)
(8) Conversion result is stored in AD0CR2 register
(9) Signal of ANI01 pin is A/D-converted
(11) AD0SCM.AD0CS bit = 0
(12) INTAD0 interrupt request signal is generated
(13) Returns to (3) when the next trigger is input
(14) Set AD0CE bit to 0 to end (stop)
bits
=
A/D converter 0
001
001
001
10,
AD0CHEN
register
AD0CR14
AD0CR15
AD0CR0
AD0CR1
AD0CR2
AD0CR3
AD0CR4
AD0CR5
=
001
000FH,
671