UPD70F3453GC-8EA-A Renesas Electronics America, UPD70F3453GC-8EA-A Datasheet - Page 852

• Manufacturer Part Number: UPD70F3453GC-8EA-A
• Description: MCU 32BIT 128KB FLASH 100LQFP
• Manufacturer: Renesas Electronics America
• Series: V850E/Ix3r

Specifications of UPD70F3453GC-8EA-A

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 56
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 5.5 V
• Data Converters: A/D 10x12b, 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

16.5.14 Clock timing
850
Notes 1. The INTCBnT interrupt is set when the data written to the CBnTX register is transferred to the data
Caution In single transfer mode, writing to the CBnTX register with the CBnTSF bit set to 1 is ignored.
Remark
2. The INTCBnR interrupt occurs if reception is correctly ended and receive data is ready in the
SCKBn pin
SIBn pin
capture
SOBn pin
Reg-R/W
INTCBnT
interrupt
INTCBnR
interrupt
CBnTSF bit
SCKBn pin
SOBn pin
INTCBnR
interrupt
SIBn pin
capture
Reg-R/W
INTCBnT
interrupt
CBnTSF bit
shift register in the continuous transmission or continuous transmission/reception mode. In the
single transmission or single transmission/reception mode, the INTCBnT interrupt request signal is
not generated, but the INTCBnR interrupt request signal is generated upon end of communication.
CBnRX register while reception is enabled. In the single mode, the INTCBnR interrupt request
signal is generated even in the transmission mode, upon end of communication.
This has no influence on the operation during transfer.
For example, if the next data is written to the CBnTX register when DMA is started by
generating the INTCBnR signal, the written data is not transferred because the CBnTSF bit is
set to 1.
Use the continuous transfer mode, not the single transfer mode, for such applications.
n = 0 to 2
Note 1
Note 2
Note 1
Note 2
(ii) Communication type 3 (CBnCKP and CBnDAP bits = 10)
(i) Communication type 1 (CBnCKP and CBnDAP bits = 00)
CHAPTER 16 CLOCKED SERIAL INTERFACE B (CSIB)
D7
D7
User’s Manual U18279EJ3V0UD
D6
D6
D5
D5
D4
D4
D3
D3
D2
D2
D1
D1
D0
D0
(1/2)