UPD70F3453GC-8EA-A Renesas Electronics America, UPD70F3453GC-8EA-A Datasheet - Page 699

• Manufacturer Part Number: UPD70F3453GC-8EA-A
• Description: MCU 32BIT 128KB FLASH 100LQFP
• Manufacturer: Renesas Electronics America
• Series: V850E/Ix3r

Specifications of UPD70F3453GC-8EA-A

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 56
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 5.5 V
• Data Converters: A/D 10x12b, 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

13.4 Operation
13.4.1 Basic operation
<1> Set the AD2M0.AD2PS bit to 1 to turn on A/D power while the AD2M0.AD2CE bit = 0.
<2> Select an operation mode of A/D conversion and A/D conversion time by using the AD2M0, AD2M1, and
<3> Setting the AD2M0.AD2CE bit to 1 (enable conversion) at least 2
<4> When A/D conversion is started, the voltage input to the selected analog input channel is sampled by the
<5> When sampling has been performed for a specific time, the sample & hold circuit enters the hold status, and
<6> Set bit 9 of the successive approximation register (SAR) and changes the level of the voltage tap of the D/A
<7> The voltage generated by the voltage tap of the D/A converter is compared with the analog input voltage by a
<8> Next, bit 8 of the SAR register is automatically set, and the next comparison is started. The voltage tap of the
At this time, bits other than the AD2M0.AD2CE bit can be simultaneously set.
AD2S registers.
(AD2M0.AD2PS bit = 0 → 1) starts A/D conversion.
If the AD2CE bit is set to 1 before 2
conversion time, but the conversion result is undefined.
sample & hold circuit.
holds the input analog voltage until A/D conversion ends.
converter to the reference voltage (1/2AV
voltage comparator.
comparison, the MSB of the SAR register remains set. If the analog input voltage is less than (1/2AV
MSB is reset.
D/A converter is selected according to the value of bit 9, to which the result has been already set as shown
below.
The voltage tap of the D/A converter and the analog input voltage are compared and bit 8 of the SAR register
is manipulated according to the result of the comparison as shown below.
Comparison is continued like this to bit 0 of the SAR register.
Bit 9 = 1: (3/4AV
Bit 9 = 0: (1/4AV
Analog input voltage ≥ Voltage tap of D/A converter: Bit 8 = 1
Analog input voltage ≤ Voltage tap of D/A converter: Bit 8 = 0
DD2
DD2
)
)
If the analog input voltage is found to be greater than (1/2AV
CHAPTER 13 A/D CONVERTER 2
User’s Manual U18279EJ3V0UD
μ
s passes, the conversion operation is started and ends after A/D
DD2
).
μ
s after turning on A/D power
DD2
) as a result of
DD2
), the
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