UPD70F3453GC-8EA-A Renesas Electronics America, UPD70F3453GC-8EA-A Datasheet - Page 999

• Manufacturer Part Number: UPD70F3453GC-8EA-A
• Description: MCU 32BIT 128KB FLASH 100LQFP
• Manufacturer: Renesas Electronics America
• Series: V850E/Ix3r

Specifications of UPD70F3453GC-8EA-A

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 56
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 5.5 V
• Data Converters: A/D 10x12b, 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Caution To perform multiple interrupt servicing, the values of the EIPC and EIPSW registers must be
Remarks 1. a to u in the figure are the temporary names of interrupt request signals shown for the sake of
Interrupt request a
Interrupt request e
Interrupt request g
Interrupt request c
Figure 20-6. Example of Processing in Which Another Interrupt Request Signal Is Issued
2. The default priority in the figure indicates the relative priority between two interrupt request
saved before executing the EI instruction. When returning from multiple interrupt servicing,
restore the values of EIPC and EIPSW after executing the DI instruction.
(level 3)
(level 3)
(level 2)
(level 1)
explanation.
signals.
Main routine
EI
CHAPTER 20 INTERRUPT/EXCEPTION PROCESSING FUNCTION
Interrupt request f
Interrupt request d
Interrupt request h
Interrupt
request b
(level 2)
(level 1)
(level 3)
(level 2)
While an Interrupt Is Being Serviced (1/2)
EI
EI
EI
Servicing of a
Servicing of c
Servicing of d
Servicing of e
Servicing of f
Servicing of g
Servicing of h
User’s Manual U18279EJ3V0UD
Servicing of b
Interrupt request b is acknowledged because the
priority of b is higher than that of a and interrupts are
enabled.
Although the priority of interrupt request d is higher
than that of c, d is held pending because interrupts
are disabled.
Interrupt request f is held pending even though
interrupts are enabled because its priority is lower
than that of e.
Interrupt request h is held pending even though
interrupts are enabled because its priority is the
same as that of g.
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