UPD70F3453GC-8EA-A Renesas Electronics America, UPD70F3453GC-8EA-A Datasheet - Page 499

• Manufacturer Part Number: UPD70F3453GC-8EA-A
• Description: MCU 32BIT 128KB FLASH 100LQFP
• Manufacturer: Renesas Electronics America
• Series: V850E/Ix3r

Specifications of UPD70F3453GC-8EA-A

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 56
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 5.5 V
• Data Converters: A/D 10x12b, 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

(c) Processing of overflow when two capture registers are used
Care must be exercised in processing the overflow flag when two capture registers are used. First, an
example of incorrect processing is shown below.
The following problem may occur when two pulse widths are measured in the free-running timer mode.
<1> Read the TTmCCR0 register (setting of the default value of the TITm0 pin input).
<2> Read the TTmCCR1 register (setting of the default value of the TITm1 pin input).
<3> Read the TTmCCR0 register.
<4> Read the TTmCCR1 register.
Remark
When two capture registers are used, and if the overflow flag is cleared to 0 by one capture register, the
other capture register may not obtain the correct pulse width.
Use software when using two capture registers. An example of how to use software is shown below.
TTmCCR0 register
TTmCCR1 register
INTTTIOVm signal
Read the overflow flag. If the overflow flag is 1, clear it to 0.
Because the overflow flag is 1, the pulse width can be calculated by (10000H + D
Read the overflow flag. Because the flag is cleared in <3>, 0 is read.
Because the overflow flag is 0, the pulse width can be calculated by (D
TITm0 pin input
TITm1 pin input
16-bit counter
TTmOVF bit
Example of incorrect processing when two capture registers are used
V850E/IF3: m = 1
V850E/IG3: m = 0, 1
TTmCE bit
FFFFH
0000H
CHAPTER 8 16-BIT TIMER/EVENT COUNTER T (TMT)
D
00
User’s Manual U18279EJ3V0UD
<1>
D
10
<2>
D
00
D
D
01
10
<3>
D
11
<4>
11
D
01
− D
10
D
) (incorrect).
11
01
− D
00
).
497