UPD70F3453GC-8EA-A Renesas Electronics America, UPD70F3453GC-8EA-A Datasheet - Page 384

• Manufacturer Part Number: UPD70F3453GC-8EA-A
• Description: MCU 32BIT 128KB FLASH 100LQFP
• Manufacturer: Renesas Electronics America
• Series: V850E/Ix3r

Specifications of UPD70F3453GC-8EA-A

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 56
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 5.5 V
• Data Converters: A/D 10x12b, 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

382
TABnIOC2
TABnOPT0
(e) TABn I/O control register 2 (TABnIOC2)
(f) TABn option register 0 (TABnOPT0)
(g) TABn counter read buffer register (TABnCNT)
(h) TABn capture/compare registers 0 to 3 (TABnCCR0 to TABnCCR3)
The value of the 16-bit counter can be read by reading the TABnCNT register.
These registers function as capture registers or compare registers depending on the setting of the
TABnOPT0.TABnCCSa bit.
When the registers function as capture registers, they store the count value of the 16-bit counter when
the valid edge input to the TIBna pin is detected.
When the registers function as compare registers and when D
INTTBnCCa signal is generated when the counter reaches (D
TOBn0 to TOBn3 pins are inverted.
Remark
TABnCCS3
0/1
0
n = 0, 1
a = 0 to 3
TABnCCS2
Figure 7-35. Register Setting in Free-Running Timer Mode (3/3)
0/1
0
CHAPTER 7 16-BIT TIMER/EVENT COUNTER AB (TAB)
TABnCCS1
0/1
0
TABnCCS0
User’s Manual U18279EJ3V0UD
0/1
0
TABnEES1
0/1
0
TABnCMS TABnCUF
TABnEES0 TABnETS1 TABnETS0
0/1
0
0
a
0
a
is set to the TABnCCRa register, the
+ 1), and the output signals of the
TABnOVF
0/1
0
Select valid edge of
external event count input
(EVTBn pin)
Overflow flag
Specifies if TABnCCR0
register functions as
capture or compare register
0: Compare register
1: Capture register
Specifies if TABnCCR1
register functions as
capture or compare register
0: Compare register
1: Capture register
Specifies if TABnCCR2
register functions as
capture or compare register
0: Compare register
1: Capture register
Specifies if TABnCCR3
register functions as
capture or compare register
0: Compare register
1: Capture register