UPD70F3453GC-8EA-A Renesas Electronics America, UPD70F3453GC-8EA-A Datasheet - Page 379

• Manufacturer Part Number: UPD70F3453GC-8EA-A
• Description: MCU 32BIT 128KB FLASH 100LQFP
• Manufacturer: Renesas Electronics America
• Series: V850E/Ix3r

Specifications of UPD70F3453GC-8EA-A

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 56
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 5.5 V
• Data Converters: A/D 10x12b, 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

7.6.6
set to 1. At this time, the TABnCCRa register can be used as a compare register or a capture register, depending on
the setting of the TABnOPT0.TABnCCSa bit.
In the free-running timer mode, 16-bit timer/event counter AB starts counting when the TABnCTL0.TABnCE bit is
Note Because the capture trigger input pin (TIBnb) and timer output pin (TOBnb) share the same alternate-
Remark
(external event
TIBn0 pin
trigger input)
TIBn1 pin
trigger input)
TIBn2 pin
trigger input)
TIBn3 pin
trigger input)
Free-running timer mode (TABnMD2 to TABnMD0 bits = 101)
count input)
EVTBn pin
function pin, the two functions cannot be used at the same time.
(capture
(capture
(capture
(capture
n = 0, 1, a = 0 to 3, b = 1 to 3
Internal count clock
Note
Note
Note
Note
detector
detector
detector
detector
detector
Edge
Edge
Edge
Edge
Edge
Figure 7-32. Configuration in Free-Running Timer Mode
CHAPTER 7 16-BIT TIMER/EVENT COUNTER AB (TAB)
selection
TABnCE
Count
clock
bit
User’s Manual U18279EJ3V0UD
TABnCCR0
TABnCCR0
(compare)
(capture)
register
register
TABnCCR1
TABnCCR1
(compare)
(capture)
register
register
TABnCCR2
TABnCCR2
(compare)
(capture)
register
register
16-bit counter
TABnCCR3
TABnCCR3
(compare)
(capture)
register
register
controller
controller
controller
controller
0
1
(capture/compare
Output
Output
Output
Output
TABnCCSa bit
0
1
selection)
0
1
0
1
INTTBnOV signal
INTTBnCC3 signal
INTTBnCC2 signal
INTTBnCC1 signal
INTTBnCC0 signal
TOBn3 pin
TOBn2 pin
TOBn1 pin
TOBn0 pin
Note
Note
Note
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