UPD70F3453GC-8EA-A Renesas Electronics America, UPD70F3453GC-8EA-A Datasheet - Page 270

• Manufacturer Part Number: UPD70F3453GC-8EA-A
• Description: MCU 32BIT 128KB FLASH 100LQFP
• Manufacturer: Renesas Electronics America
• Series: V850E/Ix3r

Specifications of UPD70F3453GC-8EA-A

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 56
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 5.5 V
• Data Converters: A/D 10x12b, 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

268
<1> Count operation start flow
<2> TAAmCCR0, TAAmCCR1 register
(TAAmCKS0 to TAAmCKS2 bits)
Setting of TAAmCCR0 register
Setting of TAAmCCR1 register
setting change flow (cycle only)
Remark
TAAmCCR0 register,
Register initial setting
TAAmCTL1 register,
TAAmIOC0 register,
TAAmIOC2 register,
TAAmCCR1 register
TAAmCTL0 register
TAAmCE bit = 1
START
V850E/IF3: m = 2, 4, a = 0, 1
V850E/IG3: m = 2 to 4, a = 0, 1
Figure 6-35. Software Processing Flow in PWM Output Mode (2/2)
CHAPTER 6 16-BIT TIMER/EVENT COUNTER AA (TAA)
Initial setting of these
registers is performed
before setting the
TAAmCE bit to 1.
The TAAmCKS0 to
TAAmCKS2 bits can be
set at the same time when
counting is enabled
(TAAmCE bit = 1).
Writing same value
(same as preset value of
the TAAmCCR1 register)
to the TAAmCCR1
register is necessary when
only the set cycle is changed.
When the counter is
cleared after setting,
the value of the TAAmCCRa
register is transferred to the
CCRa buffer register.
User’s Manual U18279EJ3V0UD
<3> TAAmCCR0, TAAmCCR1 register
<4> TAAmCCR0, TAAmCCR1 register
<5> Count operation stop flow
Setting of TAAmCCR1 register
Setting of TAAmCCR0 register
Setting of TAAmCCR1 register
setting change flow (duty only)
setting change flow (cycle and duty)
TAAmCE bit = 0
STOP
Counting is stopped.
Only writing of the TAAmCCR1
register must be performed
when only the set duty factor is
changed. When the counter is
cleared after setting, the
value of compare register a
is transferred to the CCRa
buffer register.
When the counter is
cleared after setting,
the value of compare
register a is transferred
to the CCRa buffer register.