MC68HC711PH8 Motorola, MC68HC711PH8 Datasheet - Page 120

no-image

MC68HC711PH8

Manufacturer Part Number
MC68HC711PH8
Description
High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcomputer Unit
Manufacturer
Motorola
Datasheet
6
PT2 — MI BUS TX polarity (See Section 5.6.2)
This control bit allows for different driver interfaces between the MCU and the MI BUS wire.
6.6.4
RIE2 — Receiver interrupt enable 2
TE2 — Transmitter enable 2
RE2 — Receiver enable 2
SBK2 — Send break 2
When an MI BUS wire is held low for eight or more time slots an internal circuit on any slave device
connected to the bus may reset or preset the device with default values.
MOTOROLA
6-10
SCI2/MI control 2 (S2CR2)
1 (set)
0 (clear) –
1 (set)
0 (clear) –
1 (set)
0 (clear) –
1 (set)
0 (clear) –
1 (set)
0 (clear) –
S2CR2 — MI BUS control register 2
MI BUS transmit pin will send inverted data.
MI BUS transmit pin functions normally.
MI BUS interrupt requested when RDRF2 flag is set.
RDRF2 and OR2 interrupts disabled.
Transmitter enabled and port pin dedicated to the MI BUS.
Transmitter disabled.
Port pin dedicated to the MI BUS; the receiver is enabled by a pull
sync and is inhibited during a push field.
Receiver disabled.
MI transmit line is set low for 20 time slots.
No action.
MOTOROLA INTERCONNECT BUS (MI BUS)
Address
$0053
bit 7
Ñ
bit 6
Ñ
RIE2
bit 5
bit 4
Ñ
bit 3
TE2
bit 2
RE2
bit 1
Ñ
MC68HC11PH8
SBK2 0000 0000
bit 0
on reset
State
TPG

Related parts for MC68HC711PH8