MC68HC711PH8 Motorola, MC68HC711PH8 Datasheet - Page 59
MC68HC711PH8
Manufacturer Part Number
MC68HC711PH8
Description
High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcomputer Unit
Manufacturer
Motorola
Datasheet
1.MC68HC711PH8.pdf
(264 pages)
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PH8.DS03/Modes+mem
FREEZ — Address bus freeze in expanded user mode
To reduce RFI emissions, the address bus (on ports B and F) is not active while internal resources
are being accessed, but will instead freeze on the last external address. At this time, the data bus
port C is three-stated (high impedance) with weak pull-ups active, R/W is forced high and the E
clock enable is pulled low. At reset, the address bus is initialized to $FFFE. Refer to Figure 3-2.
CLK4X — 4X clock enable
Note:
PAREN — Pull-up assignment register enable (refer to Section 4)
MC68HC11PH8
Internal E
(internal
signal)
ADDR
IMMP
DATA
R/W
1 (set)
0 (clear) –
1 (set)
0 (clear) –
1 (set)
0 (clear) –
E
The 4XOUT pin is not available on 84-pin packaged devices.
–
–
–
(Resistive pull-up)
Figure 3-2 Example of expanded mode FREEZ actions
The external bus is only active when externally mapped resources
are accessed (expanded mode only).
Normal operation.
4XCLK or EXTALi driven out on the 4XOUT pin (see Section 3.3.2.5)
4XOUT pin disabled.
Pull-ups can be enabled using PPAR.
All pull-ups disabled (not controlled by PPAR).
Internal
OPERATING MODES AND ON-CHIP MEMORY
—this line does not form part of the document—
External
In
Out
[DS97 v 4.1] 08/Apr/97@13:55
Internal
MOTOROLA
TPG
3-13
10
12
13
14
15
11
1
2
3
4
5
6
7
8
9
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