MC68HC711PH8 Motorola, MC68HC711PH8 Datasheet - Page 60

• Manufacturer Part Number: MC68HC711PH8
• Description: High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcomputer Unit
• Manufacturer: Motorola

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08/Apr/97@13:55 [DS97 v 4.1]
NOSEC — EEPROM security disabled (refer to Section 3.4.4)
NOCOP — COP system disable (refer to Section 10)
ROMON — ROM enable
In single chip mode, reset sets this bit. In special test mode, reset clears ROMON. On the
MC68HC711PH8 , and on the MC68HC11PH8 if selected by a mask option, ROMON can be
modified in expanded and special test modes. In this case, care must be taken to include reset
and interrupt vectors in both internal and external memory maps. The routines for altering
ROMON should not be located at addresses in the internal ROM/ EPROM memory range, but
rather at different external ROM/ EPROM addresses or in internal EEPROM.
EEON — EEPROM enable
3.3.2.2
The internal registers used to control the operation of the MCU can be relocated on 4K boundaries
within the memory space with the use of INIT. This 8-bit special-purpose register can change the
default locations of the RAM and control registers within the MCU memory map. It can be written
to only once within the first 64 E clock cycles after a reset. It then becomes a read-only register.
RAM[3:0] — RAM map position
These four bits, which specify the upper hexadecimal digit of the RAM address, control the
position of the RAM in the memory map. The RAM can be positioned at the beginning of any 4K
page in the memory map. Refer to Table 3-5.
MOTOROLA
3-14
RAM & I/O mapping (INIT)
1 (set)
0 (clear) –
1 (set)
0 (clear) –
1 (set)
0 (clear) –
1 (set)
0 (clear) –
INIT — RAM and I/O mapping register
–
–
–
–
Disable security.
Enable security.
COP system disabled.
COP system enabled (forces reset on timeout).
ROM/ EPROM included in the memory map.
ROM/ EPROM excluded from the memory map.
EEPROM included in the memory map.
EEPROM is excluded from the memory map.
OPERATING MODES AND ON-CHIP MEMORY
Address
—this line does not form part of the document—
$003D
RAM3 RAM2 RAM1 RAM0 REG3 REG2 REG1 REG0 0000 0000
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
PH8.DS03/Modes+mem
MC68HC11PH8
bit 0
on reset
State
TPG