MC68HC711PH8 Motorola, MC68HC711PH8 Datasheet - Page 40

• Manufacturer Part Number: MC68HC711PH8
• Description: High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcomputer Unit
• Manufacturer: Motorola

2
2.11
62 pins on the device are arranged into seven 8-bit ports: A, B, C, E, F, G, and H, and one six-bit
port (D). The lines of ports A, B, C, D, F, G, and H are fully bidirectional; E is input only. Each of
the bidirectional ports serves a purpose other than I/O, depending on the operating mode or
peripheral function selected. Note that ports B, C, F, and one bit of port G are available for I/O
functions only in single chip and bootstrap modes. Refer to Table 2-2 for details of the port signals’
functions in different operating modes.
Note:
2.11.1
Port A is an 8-bit general purpose I/O port with a data register (PORTA) and a data direction
register (DDRA). Port A pins share functions with the 16-bit timer system (see Section 8 for further
information). PORTA can be read at any time and always returns the pin level. If written, PORTA
stores the data in internal latches. The pins are driven only if they are configured as outputs. Writes
to PORTA do not change the pin state when the pins are configured for timer output compares.
Out of reset, port A pins [7:0] are general purpose high-impedance inputs. When the functions
associated with these pins are disabled, the bits in DDRA govern the I/O state of the associated
pin. For further information, refer to Section 4.
2.11.2
Port B is an 8-bit general purpose I/O port with a data register (PORTB) and a data direction
register (DDRB). In single chip mode, port B pins are general purpose I/O pins (PB[7:0]). In
expanded mode, port B pins act as the high-order address lines (A[15:8]) of the address bus. In
either of these modes, the four high-order port B pins (B[7:4]) may be configured to drive four LCD
segments (see Section 2.12)
PORTB can be read at any time and always returns the pin level. If PORTB is written, the data is
stored in internal latches. The pins are driven only if they are configured as outputs in single chip
or bootstrap mode. For further information, refer to Section 4.
Port B pins include on-chip pull-up devices which can be enabled or disabled via the port pull-up
assignment register (PPAR).
MOTOROLA
2-14
When using the information about port functions, do not confuse pin function with the
electrical state of the pin at reset. All general purpose I/O pins configured as inputs at
reset are in a high-impedance state. Port data registers reflect the functional state of
the port at reset. The pin function is mode dependent.
Port signals
Port A
Port B
PIN DESCRIPTIONS
MC68HC11PH8
TPG