MC68HC711PH8 Motorola, MC68HC711PH8 Datasheet - Page 89

• Manufacturer Part Number: MC68HC711PH8
• Description: High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcomputer Unit
• Manufacturer: Motorola

4.9
Four of the ports (B, F, G and H) have internal, software selectable pull-up resistors under control
of the port pull-up assignment register (PPAR).
4.9.1
Bits [7:5] — Not implemented; always read zero.
HWOIF — Port H wired-OR interrupt flag
This bit is cleared by a write to the PPAR register with HWOIF set. When this function is used,
care must be taken when changing pull-up enable bits to prevent accidental clearing of this flag.
xPPUE — Port x pin pull-up enable
These bits control the on-chip pull-up devices connected to all the pins on I/O ports B, F, G and H.
They are collectively enabled or disabled via the PAREN bit in the CONFIG register (see Section
4.10.2).
Note:
Note:
4.10
One bit in each of the following registers is directly concerned with the configuration of the I/O
ports. For full details on the other bits in the registers, refer to the appropriate section.
MC68HC11PH8
Port pull-up assignment (PPAR)
1 (set)
0 (clear) –
1 (set)
0 (clear) –
FPPUE and BPPUE have no effect in expanded mode since ports F and B are
dedicated address bus or LCD outputs.
When the SCI2 receiver is enabled, the associated pull-up on port G is disabled.
Internal pull-up resistors
PPAR — Port pull-up assignment register
System configuration
–
–
Port H keyboard interrupt request.
No port H keyboard interrupt request.
Port x pin on-chip pull-up devices enabled.
Port x pin on-chip pull-up devices disabled.
Address
$002C
PARALLEL INPUT/OUTPUT
bit 7
0
bit 6
0
bit 5
0
HWOIF HPPUE GPPUE FPPUE BPPUE 0000 1111
bit 4
bit 3
bit 2
bit 1
bit 0
MOTOROLA
on reset
State
TPG
4-11
4