MC68HC711PH8 Motorola, MC68HC711PH8 Datasheet - Page 58

• Manufacturer Part Number: MC68HC711PH8
• Description: High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcomputer Unit
• Manufacturer: Motorola

10
12
13
14
15
11
1
2
3
4
5
6
7
8
9
08/Apr/97@13:55 [DS97 v 4.1]
3.3.2
Because bits in the following registers control the basic configuration of the MCU, an accidental
change of their values could cause serious system problems. The protection mechanism,
overridden in special operating modes, requires a write to the protected bits only within the first 64
bus cycles after any reset, or only once after each reset. See Table 3-3.
3.3.2.1
CONFIG controls the presence and/or location of ROM/ EPROM and EEPROM in the memory
map and enables the COP watchdog system.The FREEZ bit provides a method of reducing RFI
emissions in expanded mode, the CLK4X bit enables the 4XOUT pin to output either 4XCLK or
the internal EXTAL signal (EXTALi), and the PAREN bit enables pull-ups on certain ports. A
security feature that protects data in EEPROM and RAM is available, controlled by the NOSEC
bit. Refer to Section 3.4.4.
CONFIG is made up of EEPROM cells and static working latches. The operation of the MCU is
controlled directly by these latches and not the EEPROM byte. When programming the CONFIG
register, the EEPROM byte is accessed. When the CONFIG register is read, the static latches are
accessed.
These bits can be read at any time. The value read is the one latched into the register from the
EEPROM cells during the last reset sequence. A new value programmed into this register is not
readable until after a subsequent reset sequence.
On the MC68HC711PH8 , and on the MC68HC11PH8 if selected by a mask option, the ROMON
bit can be written at any time if MDA = 1 (expanded mode or special test mode). It cannot be
written in bootstrap mode, and is forced to a logic one in single chip mode.
Other bits in CONFIG can be written at any time if SMOD = 1 (bootstrap or special test mode). If
SMOD = 0 (single chip or expanded mode), these bits can only be written using the EEPROM
programming sequence, and none of the bits are readable or active until latched via the next reset.
FREEZ is only active in expanded user mode.
ROMAD — ROM mapping control
In single chip mode, reset sets this bit.
MOTOROLA
3-12
ConÞguration control (CONFIG)
1 (set)
0 (clear) –
Initialization
CONFIG — System configuration register
–
ROM/ EPROM addressed from $4000 to $FFFF.
ROM/ EPROM addressed from $0000 to $BFFF (expanded mode
only).
OPERATING MODES AND ON-CHIP MEMORY
Address
—this line does not form part of the document—
$003F ROMAD FREEZ CLK4X PAREN NOSEC NOCOP ROMON EEON xxxx xxxx
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
PH8.DS03/Modes+mem
MC68HC11PH8
bit 0
on reset
State
TPG